Mallinckrodt NELLCOR NPB-4000, Service Manual

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Section 11: Isolated Front End Functions -- Theory of Operation
11-10
The parity bit is set for odd and is checked in the odd/even parity checker U65.
Even parity, if detected, represents an error and the U65 output signal will turn
on switch U63A. The switch will drive the output of U60 amplifier beyond the
normal range of data signals and will set A/D output at all ones, which will be
interpreted as an error.
Lead Select bits 12 and 13 select lead and test configurations as follows:
Bit 12 Bit 13 Selection
0 0 Test
0 1 Lead I
1 0 Lead II
1 1 Lead III
The mux address bits determine the following selections:
Bit 14 Bit 15 Bit 16 Selection
0 0 0 ECG
0 0 1 QRS
0 1 0 PM
0 1 1 RESP
1 0 0 LOFF
1 0 1 SCAL
1 1 1 AGN
11.9 A/D CONVERTER
A/D converter U53 on the non-isolated side is a 12-bit, 100 kHz sampling rate
device with serial control and 14 analog inputs (3 are internal and 11 are
external). It is configured for unipolar operation, 5 volts input and 16-bit cycle.
The converter has four control lines: ADCS*(CS*), ADCRX(DATA/OUT),
ADCTX(DATA/IN) and ADCCLK(I/CLK).
Clock rate is set at 25 kHz. Each
control burst is 16 bits long. The first eight-bit encode control information for
the converter (MSB first) is: four-bit analog channel address (D7-D4), two-bit
data length select (D3-D2), output format MSB or LSB first encode (D1) and
unipolar or bipolar output select (D0). The last eight bits are ignored (they are
used, though, to control operations of the isolated part).
When selected, the converter enables DATA INPUT and the I/O CLOCK and
removes DATA OUT from the high impedance state. The I/O CLOCK shifts out
data from the previous conversion and clocks in control bits for the current
conversion. On the fourth falling edge of the I/O CLOCK the next channel
selection is complete and the converter goes into the sampling mode. The falling
edge of the 16
th
I/O CLOCK puts data in hold, takes EOC low and begins the
current conversion which lasts for 10 millisecond. If the selected channel is
ISOAD the data comes from a channel of multiplexer U67, selected during
previous serial burst. At least 80 microseconds delay is required between serial