Configuration
Function blocks
2−41
l
EDSVF9383V−EXT EN 2.0
2.4
Function blocks
2.4.1
List of function blocks
Function block
Description
CPU time
[
m
s]
used in basic configuration C0005
1000
2000
3000
4000
5000
6000
7000
8000
9000
ABS1
Absolute−value generator
4
D
D
ADD1
Addition block 1
8
D
D
D
D
D
ADD2
Addition block 2
AIF−IN
Fieldbus
−
D
D
D
D
D
D
D
D
D
AIF−OUT
Fieldbus
56
D
D
D
D
D
D
D
D
D
AIN1
Analog input X6/1, X6/2
11
D
D
D
D
D
D
D
D
D
AIN2
Analog input X6/3, X6/4
29
D
D
D
D
D
D
D
D
D
AND1
Logic AND, block1
6
D
AND2
Logic AND, block2
AND3
Logic AND, block3
AND4
Logic AND, block4
AND5
Logic AND, block5
ANEG1
Analog inverter 1
4
D
D
D
D
D
D
D
D
D
ANEG2
Analog inverter 2
D
D
D
D
D
AOUT1
Analog output X6/62
12
D
D
D
D
D
D
D
D
D
AOUT2
Analog output X6/63
D
D
D
D
D
D
D
D
D
ARIT1
Arithmetic block 1
11
D
D
D
D
ARIT2
Arithmetic block 2
ARIT3
Arithmetic block 3
ASW1
Analog selector 1
4
D
D
D
D
D
ASW2
Analog selector 2
D
D
ASW3
Analog selector 3
BRK1
Holding brake control
15
CAN−IN
System bus
−
D
D
D
D
D
D
D
D
D
CAN−OUT
System bus
56
D
D
D
D
D
D
D
D
D
CMP1
Comparator 1
15
D
D
D
D
D
D
D
D
D
CMP2
Comparator 2
D
D
CMP3
Comparator 3
D
CMP4
Comparator 4
CONV1
Analog signal conversion
8
D
D
CONV2
Analog signal conversion
CONV3
Converting speed signals into
analog signals
D
D
CONV4
Converting speed signals into
analog signals
CONV5
Converting analog signals into
speed signals
D
CONVPHA1
32−bit conversion
6
CURVE1
Characteristic function
15
DB1
Dead band
7
DCALC1
Diameter calculator
50
D
D
DCTRL
Device control
−
D
D
D
D
D
D
D
D
D
DFIN
Digital frequency input
5
D
D
D
D
DFOUT
Digital frequency output
35
D
D
D
D
D
D
D
DFRFG1
Digital frequency ramp function
generator
40
DFSET
Digital frequency processing
85
D
D
D
DIGDEL1
Binary delay element 1
9
D
DIGDEL2
Binäres delay element 2
DIGIN
Input terminal X5/E1
X5/E5
−
D
D
D
D
D
D
D
D
D
DIGOUT
Output terminal X5/A1
X5/A4
−
D
D
D
D
D
D
D
D
D
DT1−1
Differentiator
12
FCNT1
Free unit counter
11
FDO
Free digital outputs
−
D
D
D
D
D
D
D
D
D