Intel® Server System S9200WK Product Family Setup and Service Guide
89
Checkpoint
Diagnostic LED Decoder
Description
1 = LED On, 0 = LED Off
Upper Nibble
(Amber - Read 1st)
Lower Nibble
(Green - Read 2nd)
MSB
LSB
8h 4h 2h 1h 8h 4h 2h 1h
0h 0
0
0
0
0
0
0
0 Clear POST Code
S3 Resume
40h
0
1
0
0
0
0
0
0 S3 Resume PEIM (S3 started)
41h
0
1
0
0
0
0
0
1 S3 Resume PEIM (S3 boot script)
42h
0
1
0
0
0
0
1
0 S3 Resume PEIM (S3 Video Repost)
43h
0
1
0
0
0
0
1
1 S3 Resume PEIM (S3 OS wake)
BIOS Recovery
46h
0
1
0
0
0
1
1
0 PEIM which detected forced Recovery condition
47h
0
1
0
0
0
1
1
1 PEIM which detected User Recovery condition
48h
0
1
0
0
1
0
0
0 Recovery PEIM (Recovery started)
49h
0
1
0
0
1
0
0
1 Recovery PEIM (Capsule found)
4Ah
0
1
0
0
1
0
1
0 Recovery PEIM (Capsule loaded)
E8h
1
1
1
0
1
0
0
0 No Usable Memory Error:
E9h
1
1
1
0
1
0
0
1
Memory is locked by Intel® Trusted Execution Technology and is
inaccessible.
EAh
1
1
1
0
1
0
1
0 DDR4 Channel Training Error:
EBh
1
1
1
0
1
0
1
1 Memory Test Failure
EDh
1
1
1
0
1
1
0
1 DIMM Configuration/Population Error
EFh
1
1
1
0
1
1
1
1 Indicates a CLTT table structure error
B0h
1
0
1
1
0
0
0
0 Detect DIMM population
B1h
1
0
1
1
0
0
0
1 Set DDR4 frequency
B2h
1
0
1
1
0
0
1
0 Gather remaining SPD data
B3h
1
0
1
1
0
0
1
1 Program registers on the memory controller level
B4h
1
0
1
1
0
1
0
0 Evaluate RAS modes and save rank information
B5h
1
0
1
1
0
1
0
1 Program registers on the channel level
B6h
1
0
1
1
0
1
1
0 Perform the JEDEC defined initialization sequence
B7h
1
0
1
1
0
1
1
1 Train DDR4 ranks
B8h
1
0
1
1
1
0
0
0 Initialize CLTT/OLTT
B9h
1
0
1
1
1
0
0
1 Hardware memory test and init
BAh
1
0
1
1
1
0
1
0 Execute software memory init
BBh
1
0
1
1
1
0
1
1 Program memory map and interleaving
BCh
1
0
1
1
1
1
0
0 Program RAS configuration
BFh
1
0
1
1
1
1
1
1 MRC is done
