Intel® Server System S9200WK Product Family Setup and Service Guide
87
BIOS POST Progress Codes
The following table provides a list of all POST progress codes.
Table 5. POST progress codes
Checkpoint
Diagnostic LED Decoder
Description
1 = LED On, 0 = LED Off
Upper Nibble
(Amber - Read 1st)
Lower Nibble
(Green - Read 2nd)
MSB
LSB
8h 4h 2h 1h 8h 4h 2h 1h
SEC Phase
01h
0
0
0
0
0
0
0
1 First POST code after CPU reset
02h
0
0
0
0
0
0
1
0 Microcode load begin
03h
0
0
0
0
0
0
1
1 CRAM initialization begin
04h
0
0
0
0
0
1
0
0 EI Cache When Disabled
05h
0
0
0
0
0
1
0
1 SEC Core at Power on Begin
06h
0
0
0
0
0
1
1
0 Early CPU initialization during Sec Phase.
UPI RC (Fully leverage without platform change)
A1h
1
0
1
0
0
0
0
1 Collect info such as SBSP, Boot Mode, Reset type etc.
A3h
1
0
1
0
0
0
1
1 Setup minimum path between SBSP & other sockets
A7h
1
0
1
0
0
1
1
1 Topology discovery and route calculation
A8h
1
0
1
0
1
0
0
0 Program final route
A9h
1
0
1
0
1
0
0
1 Program final IO SAD setting
AAh
1
0
1
0
1
0
1
0 Protocol layer and other uncore settings
ABh
1
0
1
0
1
0
1
1 Transition links to full speed operation
ACh
1
0
1
0
1
1
0
0 Phy layer setting
ADh
1
0
1
0
1
1
0
1 Link layer settings
AEh
1
0
1
0
1
1
1
0 Coherency settings
AFh
1
0
1
0
1
1
1
1 UPI initialization done
07h
0
0
0
0
0
1
1
1 Early SB initialization during Sec Phase.
08h
0
0
0
0
1
0
0
0 Early NB initialization during Sec Phase.
09h
0
0
0
0
1
0
0
1 End Of Sec Phase.
0Eh
0
0
0
0
1
1
1
0 Microcode Not Found.
0Fh
0
0
0
0
1
1
1
1 Microcode Not Loaded.
PEI Phase
10h
0
0
0
1
0
0
0
0 PEI Core
11h
0
0
0
1
0
0
0
1 CPU PEIM
15h
0
0
0
1
0
1
0
1 NB PEIM
19h
0
0
0
1
1
0
0
1 SB PEIM
MRC Progress Codes
31h
0
0
1
1
0
0
0
1 Memory Installed
32h
0
0
1
1
0
0
1
0 CPU PEIM (CPU Init)
33h
0
0
1
1
0
0
1
1 CPU PEIM (Cache Init)
4Fh
0
1
0
0
1
1
1
1 Dxe IPL started
DXE Phase
60h
0
1
1
0
0
0
0
0 DXE Core started
61h
0
1
1
0
0
0
0
1 DXE NVRAM Init
62h
0
1
1
0
0
0
1
0 DXE Setup Init
63h
0
1
1
0
0
0
1
1 DXE CPU Init
65h
0
1
1
0
0
1
0
1 DXE CPU BSP Select
