3-10
3
save the current Enable and Transition register values as shown in the
example. e.g.
STAT:OPER:ENAB 1
'enables Status A bit
STAT:OPER:NTR 1
'enables neg transition
*PSC 0; *ESE 192; *SRE 32 'saves Power-on bits and current registers
values as the new power on settings.
The enable and transition register setting commands must be on the same
line or set prior to the
*PSC 0
command to be saved. A later
*PSC 1
command sets the PSC flag which will cause the registers to be cleared at
the next power turn-on.
3.4.8
488.2 Differences from 488.1 Devices
The IEEE 488.1 Device Clear command does not reset the 4807/4867's
digital outputs as would be expected of a 488.1 device. To reset the digital
outputs, use the
*RST
(Reset) or
*RCL 0
command.
