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CGW-MB Installation and Users’ Manual | P/N:LS10248-000HW-E | REV.G | JUL/31/2022
60
Register Mapping
Modbus Communications
7.21.2 Point Device Type Input Registers
There are 6000 point device type holding registers. Each register address consists of two
bytes representing a detector or module.
400301
400600
L1M1–L1M300
400601
400900
L2D1–L2D300
400901
401200
L2M1–L2M300
401201
401500
L3D1–L3D300
401501
401800
L3M1–L3M300
401801
402100
L4D1–L4D300
402101
402400
L4M1–L4M300
402401
402700
L5D1–L5D300
402701
403000
L5M1–L5M300
403001
403300
L6D1–L6D300
403301
403600
L6M1–L6M300
403601
403900
L7D1–L7D300
403901
404200
L7M1–L7M300
404201
404500
L8D1–L8D300
404501
404800
L8M1–L8M300
404801
405100
L9D1–L9D300
405101
405400
L9M1–L9M300
405401
405700
L10D1–L10D300
405701
406000
L10M1–L10M300
Table 7.15: Point Status Holding Register Channel Addresses (Continued)
NOTE:
On the AFP-2800, output activation status is not reported to the CGW-MB and
therefore the bits and event type will always indicate a non-active state.
NOTE:
If the point is not present in the panel programming, all bits in the byte will contain
a value of
1
or
FFFFH
.
Table 7.16: Point Device Type Input Register Bit Definitions
Upper Byte
Lower Byte
Bit
No.
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Device Types
)
Table 7.17: Input Register Addresses of the Point Device Types
Start
Address
End
Address
Address
300001
300300
L1D1–L1D300
300301
300600
L1M1–L1M300
300601
300900
L2D1–L2D300
300901
301200
L2M1–L2M300
301201
301500
L3D1–L3D300
301501
301800
L3M1–L3M300