Page 1011
1 Dec 2003
34-45-4
7
MAINTENANCE MANUAL
CAS-100 COLLISION AVOIDANCE SYSTEM
Use or disclosure of information on this page is subject to the restrictions in the proprietary notice of this document.
Table 1003. Unit Internal Faults
Internal Faults
Fault Identification
DM CPU MCE PCI SP Fault
CPU1
DM CPU MCE PCI IO Fault
CPU2
DM CPU MCE PCI 429 Fault
CPU3
DM CPU MCE PCI Unknown Fault
CPU4
DM CPU Processor Transaction Fault
CPU5
DM CPU Memory Refresh Overflow Fault
CPU6
DM CPU Memory Select Fault
CPU7
DM CPU ECC Multi-bit Fault
CPU8
DM CPU Processor Unknown Fault
CPU9
SW Execution Error
SWn (where n = A to Z and identifies task)
DM BIT ADC Fault
BADC
DM ref 2.5
VREF
Synthesizer Initialization
SYN1
DM SDRAM Data
RAMD
DM SDRAM Program
RAMP
DM 12
P12
DM min12
PM12
DM 5
P5
DM 30Mon
P30
TRM 7
P7
DM 3.3
PD33
DM 2
PD2
DM 2.5
PD25
TRM min40
PR40
TRM min5
PRM5
TRM 3.3
PR33