Rev. 3.0, 10/02, page xxvi of lviii
Section
Page
Description
24.3 DC Characteristics
Table 24.2 DC
Characteristics
651
Table amended
Item
Symbol
Min
Typ
Max
Unit
Test
Conditions
Schmitt
IRQ0
to
IRQ5
V
T
–
V
CC
×
0.2
—
—
V
trigger input
IRQ7
V
T
+
—
—
V
CC
⋅
0.8
V
voltage
V
T
+
– V
T
–
V
CC
×
0.05
—
—
V
Input high
voltage
RES
,
STBY
,
NMI,
MD2 to MD0,
TRST
, TCK,
TMS, TDI,
VBUS,
UBPM
,
FWE
*
5
V
IH
V
CC
×
0.9
—
V
CC
+ 0.3
V
EXTAL,
EXTAL48,
Ports 1, 3, 7,
and A to G
V
CC
×
×
0.8
—
V
CC
+ 0.3
V
Ports 4 and 9
V
CC
0.8
—
AV
CC
+ 0.3 V
24.4.4 Timing of On-Chip
Supporting Modules
Figure 24.21 Boundary
Scan TCK Input Timing
668
Figure amended
t
TCKL
t
TCKH
t
tcyc
TCK
24.8 Flash Memory
Characteristics
Table 24.11 Flash Memory
Characteristics
672
673
Table amended
Item
Symbol
Min
Typ
Max
Unit
Programming time
*
1
*
2,
*
4
t
P
—
10
200
ms/128 bytes
Erase time
*
1,
*
3,
*
5
*
6
*
7
*
8
t
E
—
50
1000
ms/block
Reprogramming count
N
WEC
100
10,000
100
Times
Data retention time
t
DRP
10
—
—
Year
Notes added
*
6 Minimum number of times for which all characteristics are
guaranteed after rewriting. (Guarantee range is 1 to
minimum value.)
*
7 Reference value for 25°C (as a guideline, rewriting should
normally function up to this value).
*
8 Data retention characteristic when rewriting is performed
within the specification range, including the minimum value.
B. Product Model Lineup 679
Linup added
Product Class
Product Type
Name
Marking
Package (code)
H8S/2215
Flash memory
Version
HD64F2215
HD64F2215TE
120 pin TQFP (TFP-120)
HD64F2215BR
112 pin P-LFBGA (BP-112)
HD64F2215UTE
120 pin TQFP(TEP-120)
HD64F2215U
HD64F2215UBR
112 pin P-LFBGA(BP-112)
Masked ROM
Version
HD6432215A
HD6432215A(
***
)TE 120 pin TQFP (TFP-120)
HD6432215A(
***
)BR 112 pin P-LFBGA (BP-112)
HD6432215B
HD6432215B(
***
)TE 120 pin TQFP (TFP-120)
HD6432215B(
***
)BR 112 pin P-LFBGA (BP-112)
HD6432215C
HD6432215C(
***
)TE 120 pin TQFP (TFP-120)
HD6432215C(
***
)BR 112 pin P-LFBGA (BP-112)
Summary of Contents for H8S/2215 Series
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