Glentek Inc. 208 Standard Street, El Segundo, California 90245, U.S.A. (310) 322-3026
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Omega Series Digital PWM Amplifier Manual
Index Parameter Range Interpolator Mode
211 DBN_Frame_Data signed32 N/A
Read/Write Frame Data pointed to by
Frame_Data_Index
Frame_Data_Index
auto increments after each read or write
Index Frame Data
0 Frame[0].start
1 Frame[0].stop
2 Frame[1].start
3 Frame[1].stop
....
254 Frame[127].start
255 Frame[127].stop
Frame Data can be downloaded to the drive processor at any time. To transfer frame data to the Interpola-
tor/DBN processor, the Mode must be set to
DBN_Load_Frames
, See 212
212 Interpolator/DBN_Mode 0 to 7 N/A
0 = Null Mode
1 = Setup/Cal
5 = DBN_Load_Frames
6 = DBN_Enable
2,3,4,7 = Reserved
Null
Default Mode, DBN is disabled, Interpolator is operating. Only interpolated position and interpolator/
DBN status are passed from the Interpolator/DBN processor to the drive processor. No calibration or
configuration data is transferred between the Interpolator/DBN processor and the drive processor.
Setup/Cal
All setup and calibration parameters are continuously downloaded from the drive processor to the Inter-
polator/DBN processor and the calibrated sine/cosine signals are continuously uploaded from the Interpo-
lator/DBN processor to the drive processor and can be monitored to aid in calibration.
DBN_Load_Frames
The DBN frames are copied from the drive processor to the Interpolator/DBN processor beginning with
frame 0 and ending with frame
Num_DBN_Frames
-1 (see parameter 209). Frames may be downloaded to
the drive processor at any time. The number of DBN frames must be specified before entering this mode.
Frames are transferred at a rate of at 1 frame/PWM_Cycle (24kHz).
The DBN_Download_In_Progress
bit will be set in the
Interpolator/DBN_Status
register while the frames are being download and will be
cleared when the download has completed. The
Interpolator/DBN_Mode
should not be changed until the
download has completed.
DBN_Enable
Enable DBN function. The DBN will begin execution at frame 0. Once the last frame is executed
(Num_DBN_Frames-1) the DBN processor will check the
DBN_Auto_Reenable
configuration bit. If this
bit is set, DBN execution will repeat beginning at frame 0. If this bit is cleared, the
DBN_Done
bit will be
set will set in the
Interpolator/DBN_Status
register and the DBN will stay disabled until
DBN_Enable
mode is exited and re-entered.
Summary of Contents for Omega SMC9930
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