Giga-tronics Series 12000A, Operation Manual

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Series 12000A Microwave Synthesizers
1-8 Publication 31231, Rev. J, October 2003
1.3.3 Computer Interface
1.3.3.1 GPIB
The IEEE 488.2 interface connection (24-pin) between the Series 12000A and host computer
equipment for remote operation over the General Purpose Interface Bus (GPIB) is located on the rear of
the unit. The connector pin assignments are listed in Table 1-3 for all models.
N/A
PM SYNC OUT
50 ns trigger pulse output at TTL levels (Approximately
4 V into 50 W ), coincident with leading edge of the
pulse modulation envelope.
(OPTION 24 AVAILABLE ON 125XXA/127XXA
ONLY)
N/A
√
PM EXT TRIG
Connector accepts a pulse trigger input
≥
50 ns wide
at TTL level to initiate an internally generated Singlet,
Doublet, Triplet or Quadlet pulse burst.
(OPTION 24 AVAILABLE ON 125XXA/127XXA
ONLY)
N/A
√
PM VIDEO OUT
A pulse modulation envelope waveform at TTL level
(Approximately 4 V
P-P
into 50 W ) (Internally triggered
PM only).
(OPTION 24 AVAILABLE ON 125XXA/127XXA
ONLY)
N/A
√
ALC IN ALC IN
CURRENTLY NOT SUPPORTED
√ √
N/A
LOCK/LEVEL
OUT
A TTL-compatible output (High indicates the output
frequency is phase locked and the output power is
leveled).
√ √
REF IN
An external timebase input signal, 5 or 10 MHz ±1 ¥
10
-6
or better, 0.5 to 5 V
P-P
, overrides the internal
timebase. Input impedance is 100
W
nominal.
√ √
REF OUT
A buffered square wave output at 10 MHz, 2 V
P-P
minimum into 50 W , derived from the internal or
external timebase.
√ √
Table 1-3: Series 12000A IEEE 488.2 Hardware Configurations
Pin Signal Pin Signal Pin Signal
1 D101 9 IFC 17 REN
2 D102 10 SRQ 18 GND (6)
3 D103 11 ATN 19 GND (7)
4 D104 12 Shield 20 GND (8)
5 EO1 13 D105 21 GND (9)
6 DAV 14 D106 22 GND (10)
7 NRFD 15 D107 23 GND (11)
8 NDAC 16 D108 24 GND Logic
Table 1-2: Series 12000A I/O Connector Descriptions (Continued)
I/O
Connector
(Front)
I/O Connector
(Rear)
Description
Model
124XXA
125XXA/
127XXA