MB95630H Series
MN702-00009-2v0-E
FUJITSU SEMICONDUCTOR LIMITED
67
CHAPTER 4 RESET
4.2 Register
4.2.1
Reset Source Register (RSRR)
The reset source register (RSRR) indicates the source of a reset generated.
■
Register Configuration
■
Register Functions
[bit7:5] Undefined bits
Their read values are always "0". Writing values to these bits has no effect on operation.
[bit4] EXTS: External reset flag bit
When this bit is set to "1", that indicates an external reset has occurred.
When any other reset occurs, this bit retains the value that has existed before such reset occurs.
A read access or a write access (writing "0" or "1") to this bit sets it to "0".
[bit3] WDTR: Watchdog reset flag bit
When this bit is set to "1", that indicates a watchdog reset has occurred.
When any other reset occurs, this bit retains the value that has existed before such reset occurs.
A read access or a write access (writing "0" or "1") to this bit sets it to "0".
[bit2] PONR: Power-on reset flag bit
When this bit is set to "1", that indicates a power-on reset or a low-voltage detection reset (optional) has
occurred.
When any other reset occurs, this bit retains the value that has existed before such reset occurs
The circuit is only available on certain products. Check the availability of the circuit in the device data sheet.
A read access or a write access (writing "0" or "1") to this bit sets it to "0".
bit
7
6
5
4
3
2
1
0
Field
—
—
—
EXTS
WDTR
PONR
HWR
SWR
Attribute
—
—
—
R/W
R/W
R/W
R/W
R/W
Initial value
0
0
0
X
X
X
X
X
bit4
Details
Read access
Sets this bit to "0".
Being set to "1"
Indicates that the an external reset has occurred.
Write access
Sets this bit to "0".
bit3
Details
Read access
Sets this bit to "0".
Being set to "1"
Indicates that the a watchdog reset has occurred.
Write access
Sets this bit to "0".
bit2
Details
Read access
Sets this bit to "0".
Being set to "1"
Indicates that the a power-on reset or a low-voltage detection reset (optional) has occurred.
Write access
Sets this bit to "0".
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