Fujitsu 8FX, Hardware Manual

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MB95630H Series
16 FUJITSU SEMICONDUCTOR LIMITED MN702-00009-2v0-E
CHAPTER 3 CLOCK CONTROLLER
3.1 Overview
3.1 Overview
The New 8FX family has a built-in clock controller that optimizes its power
consumption. It supports both of the external main clock and the external
subclock.
The clock controller enables/disables clock oscillation, enables/disables the
supply of clock signals to the internal circuit, selects the clock source, and
controls the internal CR oscillator and frequency divider circuits.
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Overview of Clock Controller
The clock controller enables/disables clock oscillation, enables/disables clock supply to the
internal circuit, selects the clock source, and controls the internal CR oscillator and frequency
divider circuits.
The clock controller controls the internal clock according to the clock mode, standby mode
settings and the reset operation. The clock mode is used to select an internal operating clock;
the standby mode is used to enable or disable clock oscillation and signal supply.
The clock controller selects the optimum power consumption and functions depending on the
combination of clock mode and standby mode.
This device has five source clocks: a main clock formed by dividing the main oscillation clock
by two, a subclock formed by dividing the suboscillation clock by two, a main CR clock, a
main CR PLL clock formed by multiplying the main CR oscillation clock by the PLL
multiplication rate, and a sub-CR clock formed by dividing the sub-CR oscillation clock by
two.