Force SPARC/CPCI-520G, Technical Reference Manual

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Introduction
SPARC/CPCI-52x(G) Page 5
2 Introduction
The SPARC/CPCI-52x(G) is a high performance CompactPCI board
computer providing a CompactPCI system controller interface including
DMA. It is based on
• the UltraSPARC-IIi processor
• the Advanced PCI Bridge (APB) with interfaces to the CompactPCI
bus
An UPA64S card can be connected for high performance graphics sup-
port.
Memory • 32 to 1024-Mbyte EDO DRAM
• Up to 1 Mbyte secondary (L2) cache
• 1 Mbyte PLCC boot PROM and 2 Mbyte TSOP boot flash EPROM
• Up to 4 Mbyte user flash EPROM
Interfaces Interfaces of the Base-520(G):
• PCI bridge for 7 CompactPCI slots
• 10BaseT/100BaseTx Ethernet on front panel and MII on backplane
• Wide Ultra SCSI
• 2 serial I/O ports RS-232
• Floppy disc, parallel and Keyboard/Mouse ports
• UPA64S (only Base-520G)
Interfaces of the I/O-52x(G):
• 10BaseT/100BaseTx Ethernet on front panel and MII on backplane
• Wide Ultra SCSI
• 2 standard PMC card slots
• PCI bridge for additional 7 CompactPCI slots (only I/O-523G)
Real-time clock A real-time clock with on-board battery backup is also available.