FORCE OpenBoot Enhancements
System Configuration
SPARC/CPCI-52x(G)
Page 107
ter using this command.
rotary-switch@
( — byte ) returns the current state of the rotary switch. The value of
byte may be one of the values in the range
0
…
15
.
0
corresponds to posi-
tion
0
of the rotary switch,
1
corresponds to position
1
, and so forth.
7.1.3
ID PROM
Depending on the SPARC/CPCI-52x(G) variant under consideration
there are several ID PROMs, all connected via an I
2
C bus. At least 1 ID
PROM is present, the one assembled on the base board. Each ID PROM
if assembled is accessible as I
2
C bus slave via the I
2
C bus commands list-
ed below:
select-idprom
( slv# — flag ) selects an ID PROM by adjusting the I
2
C bus slave ad-
dress. If the ID PROM to be selected is not accessible or not available, an
error message is displayed. The resulting flag is
true
only if the
ID PROM is present and the selection was successful. The number slv#
of the I
2
C bus device can be one of the values listed in the table below:
i2c!
( addr data i
2
c-slave-addr — ) transmits a byte data to the ID PROM which is identi-
fied by its i
2
c-slave-addr. For i
2
c-slave-addr values see the
select-
idprom
description above. addr specifies the offset within the ID
PROM’s address range, at which data is stored in the ID PROM.
i2c@
( addr i
2
c-slave-addr — data ) reads a byte data from the ID PROM which is identi-
fied by its i
2
c-slave-addr. For i
2
c-slave-addr values see the
select-
idprom
description above. addr specifies the offset within the ID
PROM’s address range, at which data is stored in the ID PROM.
mem>idprom
( src-addr dest-addr size — ) copies a number of bytes from the on-board
memory to the ID PROM selected via
select-idprom
. The number
of bytes to be copied is specified by size, size =
1
…
512
. The source data
start at the virtual address src-addr in the on-board memory. The start ad-
dress for the copied data in the ID PROM is specified by dest-addr, dest-
slv#
I
2
C bus slave address
Description
x
in the I
2
C bus slave address depends on the action to be done:
•
x
=
1
for read access and
x
=
0
for write access.
1
1010.000
x
2
ID PROM on base board
2
1010.010
x
2
ID PROM on I/O-board
3
1010.100
x
2
reserved
(related to CompactPCI connector J3)
4
1010.110
x
2
Summary of Contents for SPARC/CPCI-520G
Page 6: ...Contents Page iv SPARC CPCI 52x G...
Page 14: ...Using This Manual Page xii SPARC CPCI 52x G...
Page 18: ...Page 4 SPARC CPCI 52x G...
Page 20: ...Introduction Page 6 SPARC CPCI 52x G...
Page 24: ...Ordering Information Introduction Page 10 SPARC CPCI 52x G...
Page 58: ...OpenBoot Firmware Base 520 G Installation Page 44 SPARC CPCI 52x G...
Page 66: ...OpenBoot Firmware Base 520 G Installation Page 52 SPARC CPCI 52x G...
Page 102: ...Ethernet and EBus2 Devices PCIO Hardware Description Page 88 SPARC CPCI 52x G...
Page 114: ...PMC Slots with Busmode Support Hardware Description Page 100 SPARC CPCI 52x G...
Page 134: ......