Embedded Solutions
Page 36
observed termination sequence [3 clocks] plus some margin can be used to set the time
out. Remember to scale for the period.
5 us ~ 165 clocks at 33 MHz.
The counter counts from 0 leading to an N+1 TimeOut length. The count is checked
with a Greater Than function effectively making it an N based count. Having said all of
that you will likely have to “play” with this variable to achieve the system performance
you need with a non packet defined interface. The shorter the time the quicker the
response and the more likely a single packet is broken into two or more pieces.
LM9_CHAN_RX_BYTECOUNT_LEN
[0x40] RX ByteCount Length
RX ByteCount Port
Data Bit
Description
31-0
Expected Bytes per Packet
Figure 23 PcieBiSerialDb37Lm9 RX ByteCount Length
The RxByteCount Length is used to specify the number of bytes in a packet.
The length can be used in several ways. The length can be used to match the known
packet size expected from the receiver. The length can be used to create smaller SW
defined packets with a received amorphous stream.
A larger DMA thread can be defined and smaller packet interrupts based on the
ByteCount allowing the SW to “chase” the reception with known step-sizes.
For example set-up a multi-megabyte DMA transfer to system memory. The DMA will
operate based on the FIFO state and have moved the Packet to memory before the
RxPacketCompleted interrupt is processed. The DMA will have only one interrupt per
large transfer. The packet interrupt will allow the host software to trail the DMA process
operating on the data stored from the Packets received. The Packets are a consistent
size making for an efficient retrieval of data from system memory to application.
Alternatively the data can be moved directly to disk using system utilities and the known
data stored into the FIFO. In this case the DMA operation would be programmed to be
called each time the Packet data arrived.
