Embedded Solutions
Page 5
List of Figures
FIGURE 1 PCIEBISERIALDB37LM9 BLOCK DIAGRAM
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FIGURE 2 PCIEBISERIALDB37LM9 TIMING DIAGRAM
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FIGURE 3 PCIEBISERIALDB37LM9 INTERNAL ADDRESS MAP BASE FUNCTIONS
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FIGURE 4 PCIEBISERIALDB37LM9 CHANNEL ADDRESS MAP
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FIGURE 5 PCIEBISERIALDB37LM9 CONTROL BASE REGISTER BIT MAP
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FIGURE 6 PCIEBISERIALDB37LM9 ID AND SWITCH BIT MAP
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FIGURE 7 PCIEBISERIALDB37LM9 STATUS PORT BIT MAP
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FIGURE 8 PCIEBISERIALDB37LM9 CHANNEL CONTROL REGISTER
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FIGURE 9 PCIEBISERIALDB37LM9 CHANNEL STATUS PORT
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FIGURE 10 PCIEBISERIALDB37LM9 WRITE DMA POINTER REGISTER
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FIGURE 11 PCIEBISERIALDB37LM9 TX FIFO DATA COUNT PORT
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FIGURE 12 PCIEBISERIALDB37LM9 READ DMA POINTER REGISTER
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FIGURE 13 PCIEBISERIALDB37LM9 RX FIFO DATA COUNT PORT
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FIGURE 14 PCIEBISERIALDB37LM9 RX/TX FIFO PORT
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FIGURE 15 PCIEBISERIALDB37LM9 TX ALMOST EMPTY LEVEL REGISTER
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FIGURE 16 PCIEBISERIALDB37LM9 RX ALMOST FULL LEVEL REGISTER
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FIGURE 17 PCIEBISERIALDB37LM9 CHANNEL TRANSMIT CONTROL REGISTER
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FIGURE 18 PCIEBISERIALDB37LM9 TX PACKET SIZE FIFO
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FIGURE 19 PCIEBISERIALDB37LM9 TX PACKET SIZE REGISTER
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FIGURE 20 PCIEBISERIALDB37LM9 CHANNEL RX CONTROL REGISTER
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FIGURE 21 PCIEBISERIALDB37LM9 RX PACKET SIZE
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FIGURE 22 PCIEBISERIALDB37LM9 RX TIMEOUT LENGTH
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FIGURE 23 PCIEBISERIALDB37LM9 RX BYTECOUNT LENGTH
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FIGURE 24 PCIEBISERIALDB37LM9 FRONT PANEL INTERFACE
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