Embedded Solutions
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in large part be ported between platforms. If you see what you need in one version and
prefer it on another please contact Dynamic Engineering about porting the design. In
most cases it will require a recompile of the VHDL and not much more. We do a lot of
“just like but different “ adaptations for our clients. Please contact us to help you with a
successful special adaptation of off- the-shelf hardware.
The DMA programmable length is 32 bits => longer than most computer OS will allow in
one segment of memory. The DMA is scatter gather capable for longer lengths than the
OS max and for OS situations where the memory is not contiguous. With Windows®
lengths of 4K are common while Linux can provide much larger spaces. Larger spaces
are more efficient as there are fewer initialization reads and reduced overhead on the
bus. A single interrupt can control the entire transfer. Head to tail operation can also be
programmed with two memory spaces with two interrupts per loop.
The hardware is organized with the IO function in channel 0 and the card level functions
in the “base”. The driver provides the ability to find the hardware and to allocate
resources to use the base and channel functions.
The basic use of the interface is to facilitate data transfer via ARC-210 radio between
the host and the remote target.
Transmitter
RTS
CTS
SendTiming
Data Out
0
7
P
•••
Start
Stop Stop Marking
Figure 2 PCIEBISERIALDB37LM9 Timing Diagram
Transmitter side timing is shown. The SendTiming signal is the reference clock and is
supplied by the Radio [ARC-210] and is free running. RTS is asserted when the host
has data to transmit via radio. The radio responds with CTS [or could already be
asserted]. Data is sent with a start bit, byte of data, parity and then 2 stop bits. If more
bytes are available to send, the next byte would start after the two stop bits. If no more
data then the stop bits are continued [and called marking].
