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Chapter 15 Timer B
157
15. T
IMER
B
15.1 Overview
The Timer B peripheral consists of a ten-bit free running up-counter, two match registers,
and two step registers. Timer B is driven by perclk/2, by perclk/16, or by the output of
Timer A1. Timer B generates an output pulse whenever the counter reaches the match
value. This output pulse can generate an interrupt and will set a status bit in the status reg-
ister. The processor may then write a new value to the match register. This allows Timer B
to be used for pulse-width or pulse-position modulation because the outputs of Timer B
can clock the outputs on Parallel Ports D and E.
The compare value comes from either the match register or the value internally generated
via the step register. When using the match register, a new match value must be written to
the match register after each match condition, LSB first. When using the step register, the
hardware automatically calculates the next match value by adding the contents of the step
register to the current match value. This allows Timer B matches to be generated at regular
periods without calculating the new match value during the interrupt service routine.
15.1.1 Block Diagram
Timer B
Counter
TBCR
Parallel Ports
DE
perclk/2
perclk/16
Timer A1
Interrupt
Generation
Interrupt
Request
TBM
x
R
TBL
x
R
TBSM
x
R
TBSL
x
R
Timer B
x
Timer B
x
Reload
Registers
=
Summary of Contents for Rabbit 5000
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