Fusion 878A
2.0 Functional Description
PCI Video Decoder
2.12 DMA Controller
100600B
Conexant
2-43
WRITEC cannot be used to begin a new line; i.e., this instruction cannot have the
SOL bit set.
WRITE123, WRITE1S23, and SKIP123 control the processing of active pixel
data stored in the FIFOs. These three instructions alone control the sequence of
planar mode
data written to target memory on a byte resolution basis. The
WRITE1S23 instruction supports further decimation of chroma on a line basis.
For each of these instructions, the same number of bytes will be processed from
FIFO2 and FIFO3.
The JUMP instruction is useful for repeating the same even/odd program for
every frame, or for switching to a new program when the sequence needs to be
changed without interrupting the pixel flow.
The SYNC instruction is used to synchronize the RISC program and the pixel
data stream. The DMA controller achieves this by using the status bits in
DWORD0 of the SYNC instruction and matching them to the four FIFO status
bits provided along with the pixel data. Once the DMA controller has matched the
status bits between the FIFO and the RISC instruction, it proceeds with outputting
data. Prior to establishing synchronization, the DMA controller reads and
discards the FIFO data.
Opcodes 0000 and 1111 are reserved to detect instruction errors. If these
opcodes or the other unused opcodes are detected, an interrupt will be set. The
DMA controller will stop processing until the RISC program is re-enabled. This
also applies to SYNC instructions specifying unused or reserved status codes.
Detecting RISC instruction errors is useful for detecting software errors in
programming, or ensuring that the DMA controller is following a valid RISC
sequence. In other words, it ensures that the program counter is not pointing to the
wrong location.
All unused/reserved bits in the instruction DWORDs must be set to 0.
2.12.4 Complex Clipping
When writing video data directly into on-screen display memory, it is necessary
to be able to clip the video image before it is put onto the PCI bus. The Fusion
878A supports complex clipping of the video image for those applications which
require the displayed video picture to be occluded by graphics objects such as a
pull-down menu, an overlaying graphics window, etc. Typically, a target graphics
frame buffer controller cannot provide overlay control for the video pixel data
stream when it is provided by a PCI bus master peripheral to the graphics PCI
host interface.
The Fusion 878A implements clipping by blocking the video image as it is
being put onto the PCI bus in the areas where graphics are to be displayed, that is,
where graphics objects are “overlaying” the video image. The Fusion 878A cuts
out portions of the video image so that it can “inlay” or fit around the displayed
graphics objects
A clip list is provided through the graphics system DirectDRAW Interface
TM
provider to the Fusion 878A device driver software. This indicates the areas of the
display where the video image is to be occluded. The Fusion 878A driver
software interprets the clip list and generates a RISC program that blocks writing
video pixels that are to be occluded, as illustrated in
