Fusion 878A
6.0 Control Register Definitions–Function 1
PCI Video Decoder
6.3 Local Registers (Memory Mapped)
100600B
Conexant
6-9
6.3 Local Registers (Memory Mapped)
Fusion 878A’s local registers reside in the 4 kB memory-addressed space reserved for each function. All of the
registers correspond to DWORDs or a subset thereof. The local registers may be written to or read through the
PCI bus at any time. Internal addressing of the Fusion 878A local registers occurs via AD[11:2] and the byte
enable bits of the PCI bus. The local memory-mapped register address locations are specified as 12-bit offsets
to the value loaded into the function’s memory-base address register. The 8-bit byte address for each of the
following register locations is {AD[11:2], 0x00}. Any register may be written or read by any combination of the
byte enables.
The following types specify how the Fusion 878A registers are implemented:
ROx
Read only with default value =
x
RW
Read/Write. All bits initialized to 0 at RST, unless otherwise stated.
RW*
Same as RW, but data read may not be the same as data written.
RR
Same as RW, but writing a 1 resets the corresponding bit location.
Writing a 0 has no effect.