Compaq AlphaServer ES40, Service Manual

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D-52 Compaq AlphaServer ES40 Service Guide
Table D–21 Bit Definition of Logout Frame Registers (Continued)
ID Bit Field Text Translation Description
MISC <43:40>
<39:32>
<31:29>
<28>
<24>
<23:20>
<19:16>
<15:12>
<11:8>
<7:4>
<1:0>
Suppress IRQ1 interrupts to 1(Hex) for CPU0, 2(Hex) for CPU1, 4(Hex) for
CPU2, and 8(Hex) for CPU3 Cchip
Cchip Revision Level : 00-07(Hex) for C2, 08-0F(Hex) for C4
0(Hex) for CPU0, 1(Hex) for CPU1, 2(Hex) for CPU2, 3(Hex) for CPU3,
4(Hex) for Pchip0, 5(Hex) for Pchip1, as device (source) which caused the
NXM
Set = NXM address detected, <31:29> are locked, DRIR <63> is set
Write 1 = Arbitration Clear
=1(Hex) for CPU0, 2(Hex) for CPU1, 4(Hex) for CPU2, and 8(Hex) for
CPU3 Arbitration Trying
=1(Hex) for CPU0, 2(Hex) for CPU1, 4(Hex) for CPU2, and 8(Hex) for
CPU3 Arbitration Won
=1(Hex) for CPU0, 2(Hex) for CPU1, 4(Hex) for CPU2, and 8(Hex) for
CPU3 to set interprocessor interrupt request.
=1(Hex) for CPU0, 2(Hex) for CPU1, 4(Hex) for CPU2, and 8(Hex) for
CPU3 interprocessor interrupt (IRQ<3>) pending
=1(Hex) for CPU0, 2(Hex) for CPU1, 4(Hex) for CPU2, and 8(Hex) for
CPU3 interval timer interrupt (IRQ<2>) pending
=00(Bin) for CPU0, 01(Bin) for CPU1, 10(Bin) for CPU2, 11(Bin) for CPU3
ID performing the read.