Compaq AlphaServer ES40, Service Manual

Page: 391 / 444

Registers D-33
Table D–12 21272-CA Pchip Error Register Fields
Name Bits Type
Initial
State
Description
SYN <63:56> RO 0 ECC syndrome of error if CRE or
UECC.
PCI command of transaction when
error detected if not CRE and not
UECC. If CRE or UECC, then:
Value Command
CMD <55:52> RO 0
0000
0001
0011
Others DMA read
DMA read-modify-write
SGTE read
Reserved
INV <51> RO Rev1
RAZ Rev0 0 Info Not Valid—only meaningful when
one of bits <11:0> is set. Indicates the
validity of <SYN>, <CMD>, and
<ADDR> fields.
Value Mode
0
1
Info fields are valid .
Info fields are not valid.
ADDR <50:16> RO 0
If CRE or UECC, then ADDR<50:19> =
system address <34:3> of erroneous
quadword and ADDR<18:16> = 0.
If not CRE and not UECC, then
ADDR<50:48> = 0;
ADDR<47:18> = starting PCI address
<31:2> of transaction when error was
detected;
ADDR<17:16> = 00
→
not a DAC
operation;
ADDR<17:16> = 01
→
via DAC SG
Window 3;
ADDR<17> = 1
→
via Monster Window
Continued on next page