Registers
D-21
Table D–8 I_CTL Register Fields (Continued)
Name
Extent
Type
Description
SL_XMIT
[13]
WO
When set, drives a value on SromClk_H.
HWE
[12]
RW,0
If set, allow PALRES intructions to be
executed in kernel mode. Note that
modification of the ITB while in kernel
mode/native mode may cause
UNPREDICTABLE behavior.
BP_MODE[1:0]
[11:10]
RW,0
Branch Prediction Mode Selection.
BP_MODE[1], if set, forces all branches to
be predicted to fall through. If clear, the
dynamic branch predictor is chosen.
BP_MODE[0]. If set, the dynamic branch
predictor chooses local history prediction. If
clear, the dynamic branch predictor chooses
local or global prediction based on the state
of the chooser.
SBE[1:0]
[9:8]
RW,0
Stream Buffer Enable.
The value in this bit field specifies the
number of Istream buffer prefetches (besides
the demand-fill) that are launched after an
Icache miss. If the value is zero, only
demand requests are launched.
SDE[1:0]
[7:6]
RW,0
PALshadow Register Enable.
Enables access to the PALshadow registers.
If SDE[1] is set, R4-R7 and R20-R23 are
used as PALshadow registers. SDE[0] does
not affect 21264 operation.
Continued on next page
Summary of Contents for AlphaServer ES40
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