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CPU P State Control (Available when "Power Technology" is set to Custom)
SpeedStep (PStates)
EIST (Enhanced Intel SpeedStep Technology) allows the system to automatically adjust
processor voltage and core frequency in an effort to reduce power consumption and heat
dissipation. Refer
to Intel’s website for detailed information. The options are Disa
ble and
Enable
.
Config (Configure) TDP (Available when SpeedStep is set to Enable)
Use this feature to set the appropriate TDP (Thermal Design Power) level for the system.
The TDP refers to the maximum amount of power allowed for running "real applications"
without triggering an overheating event. The options are
Normal
, Level 1, and Level 2.
EIST PSD Function (Available when SpeedStep is set to Enable)
Use this feature to configure the processor's P-State coordination settings. During a P-State,
the voltage and frequency of the processor will be reduced when it is in operation. This
makes the processor more energy efficient, resulting in further energy gains. The options
are
HW_ALL
, SW_ALL and SW_ANY.
Turbo Mode (Available when SpeedStep is set to Enable)
Select Enable for processor cores to run faster than the frequency specified by the
manufacturer. The options are Disable and
Enable
.
Hardware PM (Power Management) State Control Available when "Power
Technology" is set to Custom)
Hardware P-States
If this feature is set to Disable, hardware will choose a P-States setting for the system based
on an OS request. If this feature is set to Native Mode, hardware will choose a P-States
setting based on OS guidance. If this feature is set to Native Mode with No Legacy Support,
hardware will choose a P-States setting independently without OS guidance. The options
are
Disable
, Native Mode, Out of Band Mode, and Native Mode with No Legacy Support.
CPU C State Control
Autonomous Core C-State
Summary of Contents for UCS C890 M5
Page 15: ...Contents Page 15 Location of the C890 M5 BMC Card ...
Page 19: ...Contents Page 19 Five 5 C890 M5 PCIEBOARD on the Rear side of Midplane ...
Page 25: ...Contents Page 25 C890 M5 BPLANE Midplane Layout Rear Side ...
Page 26: ...Contents Page 26 Front View of the C890 M5 BPLANE Midplane ...
Page 27: ...Contents Page 27 Rear View of the C890 M5 BPLANE Midplane ...
Page 28: ...Contents Page 29 2 3 14 Location of the C890 M5 BPLANE Midplane The CPU Board ...
Page 44: ...Contents Page 46 ...
Page 48: ...Contents Page 50 Mixed DIMM DC PMem Population Table ...
Page 55: ...Contents Page 57 6 Pull the card out of the PCI E board Removing a PCI E Module 3 4 ...
Page 56: ...Contents Page 58 Removing a PCI E Card from a PCIE Module 5 6 ...
Page 59: ...Contents Page 61 Installing a PCI E Card in a CPU Module ...
Page 60: ...Contents Page 62 Installing a PCI E Card in a CPU Module cont ...
Page 62: ...Contents Page 64 Installing a PCI E Card in a Storage Module ...
Page 64: ...Contents Page 66 Installing the Battery 3 2 ...
Page 66: ...Contents Page 68 Mounting a Drive in a Carrier ...
Page 70: ...Contents Page 72 Removing the Storage Module Cover ...
Page 71: ...Contents Page 73 Installing Removing 2 5 HDDs with bracket ...
Page 86: ...90 Contents Page 90 ...
Page 90: ...95 Contents Page 95 ...
Page 163: ...Contents Page 168 Save changes and Reset ...
Page 165: ...Contents Page 170 ...
Page 167: ...Contents Page 172 ...
Page 168: ...Contents Page 173 ...
Page 169: ...Contents Page 174 Emulex FC ...
Page 171: ...Contents Page 176 ...
Page 178: ...BIOS PCIe Configuration Page 183 Save changes and Reset ...
Page 179: ...BIOS PCIe Configuration Page 184 Confirm by selecting yes ...
Page 182: ...BIOS PCIe Configuration Page 187 ...
Page 183: ...BIOS PCIe Configuration Page 188 ...
Page 184: ...BIOS PCIe Configuration Page 189 ...
Page 185: ...BIOS PCIe Configuration Page 190 ...
Page 186: ...BIOS PCIe Configuration Page 191 ...
Page 188: ...BIOS PCIe Configuration Page 193 Default is enabled ...
Page 190: ...BIOS PCIe Configuration Page 195 ...
Page 191: ...BIOS PCIe Configuration Page 196 ...