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Patrol Scrub
Patrol Scrubbing is a process that allows the CPU to correct correctable memory errors
detected in a memory module and send the corrections to the requestor (the original
source). When this feature is set to Enable, the IO hub will read and write back one cache
line every 16K cycles if there is no delay caused by internal processing. By using this method,
roughly 64 GB of memory behind the IO hub will be scrubbed every day. The options are
Enable
and Disable.
Patrol Scrub Interval (Available when Patrol Scrub is set to Enable)
Use this feature to specify the number of hours (between 0 to 24) required for the system
to complete a full patrol scrubbing. Enter 0 for patrol scrubbing to be performed
automatically. The default setting is
24
.
IIO Configuration
EV DFX (Device Function On-Hide) Features
When this feature is set to Enable, the EV_DFX Lock Bits that are located in a processor will
always remain clear during electric tuning. The options are
Disable
and Enable.
Socket1 Configuration - Socket8 Configuration
IOU0 (IIO PCIe Br1)
Use this feature to configure the PCI-E Bifurcation setting for a PCI-E port specified by the
user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and
Auto
.
IOU1 (IIO PCIe Br2)
Use this feature to configure the PCI-E Bifurcation setting for a PCI-E port specified by the
user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and
Auto
.
IOU2 (IIO PCIe Br3)
Use this feature to configure the PCI-E Bifurcation setting for a PCI-E port specified by the
user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and
Auto
.
MCP0 (IIO PCIe Br4)
Use this feature to configure the PCI-E Bifurcation setting for a PCI-E port specified by the
user. The options are x16 and
Auto
.
MCP1 (IIO PCIe Br5)
Use this feature to configure the PCI-E Bifurcation setting for a PCI-E port specified by the
user. The options are x16 and
Auto
.
Summary of Contents for UCS C890 M5
Page 15: ...Contents Page 15 Location of the C890 M5 BMC Card ...
Page 19: ...Contents Page 19 Five 5 C890 M5 PCIEBOARD on the Rear side of Midplane ...
Page 25: ...Contents Page 25 C890 M5 BPLANE Midplane Layout Rear Side ...
Page 26: ...Contents Page 26 Front View of the C890 M5 BPLANE Midplane ...
Page 27: ...Contents Page 27 Rear View of the C890 M5 BPLANE Midplane ...
Page 28: ...Contents Page 29 2 3 14 Location of the C890 M5 BPLANE Midplane The CPU Board ...
Page 44: ...Contents Page 46 ...
Page 48: ...Contents Page 50 Mixed DIMM DC PMem Population Table ...
Page 55: ...Contents Page 57 6 Pull the card out of the PCI E board Removing a PCI E Module 3 4 ...
Page 56: ...Contents Page 58 Removing a PCI E Card from a PCIE Module 5 6 ...
Page 59: ...Contents Page 61 Installing a PCI E Card in a CPU Module ...
Page 60: ...Contents Page 62 Installing a PCI E Card in a CPU Module cont ...
Page 62: ...Contents Page 64 Installing a PCI E Card in a Storage Module ...
Page 64: ...Contents Page 66 Installing the Battery 3 2 ...
Page 66: ...Contents Page 68 Mounting a Drive in a Carrier ...
Page 70: ...Contents Page 72 Removing the Storage Module Cover ...
Page 71: ...Contents Page 73 Installing Removing 2 5 HDDs with bracket ...
Page 86: ...90 Contents Page 90 ...
Page 90: ...95 Contents Page 95 ...
Page 163: ...Contents Page 168 Save changes and Reset ...
Page 165: ...Contents Page 170 ...
Page 167: ...Contents Page 172 ...
Page 168: ...Contents Page 173 ...
Page 169: ...Contents Page 174 Emulex FC ...
Page 171: ...Contents Page 176 ...
Page 178: ...BIOS PCIe Configuration Page 183 Save changes and Reset ...
Page 179: ...BIOS PCIe Configuration Page 184 Confirm by selecting yes ...
Page 182: ...BIOS PCIe Configuration Page 187 ...
Page 183: ...BIOS PCIe Configuration Page 188 ...
Page 184: ...BIOS PCIe Configuration Page 189 ...
Page 185: ...BIOS PCIe Configuration Page 190 ...
Page 186: ...BIOS PCIe Configuration Page 191 ...
Page 188: ...BIOS PCIe Configuration Page 193 Default is enabled ...
Page 190: ...BIOS PCIe Configuration Page 195 ...
Page 191: ...BIOS PCIe Configuration Page 196 ...