Avaya 1000 Series, Reference

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The Micro Controller Unit (MCU) coordinates and controls the operation of the SILC. It has
internal memory, a reset and sanity timer, and a serial control interface.
The memory consists of 32 K of EPROM which contains the SILC operating program and 8 K
of RAM used to store interface selection and other functions connected with call activities.
The reset and sanity timer logic resets the MCU.
The serial control interface is an Peripheral Equipment (PE) bus used by the MPU to
communicate with the S/T transceivers.
IPE interface logic
The IPE interface logic consists of a Card-LAN interface, an IPE bus interface, a maintenance
signaling channel interface, a digital pad, and a clock controller and converter.
The Card-LAN interface is used for routine card maintenance, which includes polling the line
cards to find the card slot where the SILC is installed. It also queries the status and identification
of the card and reports the configuration data and firmware version of the card.
The IPE bus interface connects an IPE bus loop that has 32 channels operating at 64 kbps
and one additional validation and signaling bit.
The Maintenance Signaling Channel (MSC) interface communicates signaling and card
identification information from the system CPU to the SILC MCU. The signaling information
also contains maintenance instructions.
The digital pad provides gain or attenuation values to condition the level of the digitized
transmission signal according to the network loss plan. This sets transmission levels for the
B-channel voice calls.
The clock recovery circuit recovers the clock from the local exchange.
The clock converter converts the 5.12-MHz clock from the IPE backplane into a 2.56 MHz clock
to time the IPE bus channels and an 8 kHz clock to provide PCM framing bits.
The IPE interface logic consists of a Card-LAN interface, an IPE bus interface, a maintenance
signaling channel interface, a digital pad, and a clock controller and converter.
The Card-LAN interface is used for routine card maintenance, which includes polling the line
cards to find in which card slot the SILC is installed. It also queries the status and identification
of the card, and reports the configuration data and firmware version of the card.
The IPE bus interface connects one IPE bus loop that has 32 channels operating at 64 kbps
and one additional validation and signaling bit.
The maintenance signaling channel (MSC) interface is used to communicate signaling and
card identification information from the Meridian 1 CPU to the SILC MCU. The signaling
information also contains maintenance instructions.
NT6D70 SILC Line card
308 Circuit Card Reference July 2011
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