EEPROM memory
The DDCH uses a 1024 bit serial EEPROM for storing the Nortel product code and a revision
level. This information can be queried by the software.
Serial communication controller
The serial controller is the Zilog Z16C35 and is referenced as the Integrated Controller (ISCC).
The ISCC includes a flexible Bus Interface Unit (BIU) and four Direct Memory Access (DMA)
channels, one for each receive and transmit. The DMA core of the ISCC controls the data
transfer between local RAM and the communication ports.
Sanity timer
A sanity timer is incorporated on the DDCH to prevent the MPU from getting tied-up as the
result of a hardware or software fault. If the MPU encounters a hardware or software fault and
enters a continuous loop, the sanity timer enables the DDCH to reset itself.
Bus timer
The bus timer presents an error signal to the MPU if an attempt to access a device did not
receive acknowledgment within the bus time-out period of 120 ms.
Download operation
Downloading is performed in either of two modes: background mode or maintenance mode.
Before a download takes place, a D-channel link must be configured. The following situations
lead to software downloading:
• during initialization when new software is installed
• when enabling the card or application
• during card reset (due to loss of software or corruption)
• during a background audit
NTBK51 Downloadable D-channel Handler daughterboard
564 Circuit Card Reference
July 2011
Summary of Contents for 1000 Series
Page 1: ...Circuit Card Reference Nortel Communication Server 1000 7 0 NN43001 311 04 04 July 2011 ...
Page 20: ...20 Circuit Card Reference July 2011 ...
Page 30: ...Introduction 30 Circuit Card Reference July 2011 Comments infodev avaya com ...
Page 116: ...Option settings 116 Circuit Card Reference July 2011 Comments infodev avaya com ...
Page 143: ...Figure 25 CP PIV card front Physical description Circuit Card Reference July 2011 143 ...
Page 148: ...NT4N39AA CP Pentium IV Card 148 Circuit Card Reference July 2011 Comments infodev avaya com ...
Page 287: ...Figure 86 Clock Controller Option 3 Operation Circuit Card Reference July 2011 287 ...
Page 302: ...NT5K21 XMFC MFE card 302 Circuit Card Reference July 2011 Comments infodev avaya com ...
Page 346: ...NT6D80 MSDL card 346 Circuit Card Reference July 2011 Comments infodev avaya com ...
Page 353: ...Figure 96 NTDK16 DLC Functional description Circuit Card Reference July 2011 353 ...
Page 461: ...Figure 147 Paging trunk operation Applications Circuit Card Reference July 2011 461 ...
Page 462: ...NT8D15 E and M Trunk card 462 Circuit Card Reference July 2011 Comments infodev avaya com ...
Page 500: ...NTAK09 1 5 Mb DTI PRI card 500 Circuit Card Reference July 2011 Comments infodev avaya com ...
Page 512: ...NTAK10 2 0 Mb DTI card 512 Circuit Card Reference July 2011 Comments infodev avaya com ...
Page 534: ...NTAK79 2 0 Mb PRI card 534 Circuit Card Reference July 2011 Comments infodev avaya com ...
Page 550: ...NTBK22 MISP card 550 Circuit Card Reference July 2011 Comments infodev avaya com ...
Page 560: ...NTBK50 2 0 Mb PRI card 560 Circuit Card Reference July 2011 Comments infodev avaya com ...
Page 595: ...Figure 165 MGC block diagram Introduction Circuit Card Reference July 2011 595 ...
Page 662: ...NTRB21 DTI PRI DCH TMDI card 662 Circuit Card Reference July 2011 Comments infodev avaya com ...
Page 668: ...NTVQ01xx Media Card 668 Circuit Card Reference July 2011 Comments infodev avaya com ...
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