Atmel AVR XMEGA D Series, Manual, Page: 322 / 331

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8210C–AVR–09/11
Atmel AVR XMEGA D
Table of Contents
1 About the Manual ..................................................................................... 2
1.1 Reading the Manual ..........................................................................................2
1.2 Resources .........................................................................................................2
1.3 Recommended Reading ....................................................................................2
2 Overview ................................................................................................... 3
2.1 Block Diagram ...................................................................................................4
3 AVR CPU .................................................................................................. 5
3.1 Features ............................................................................................................5
3.2 Overview ............................................................................................................5
3.3 Architectural Overview .......................................................................................5
3.4 ALU - Arithmetic Logic Unit ...............................................................................6
3.5 Program Flow ....................................................................................................7
3.6 Instruction Execution Timing .............................................................................7
3.7 Status Register ..................................................................................................8
3.8 Stack and Stack Pointer ....................................................................................8
3.9 Register File ......................................................................................................9
3.10 RAMP and Extended Indirect Registers ..........................................................10
3.11 Accessing 16-bit Registers ..............................................................................11
3.12 Configuration Change Protection ....................................................................11
3.13 Fuse Lock ........................................................................................................12
3.14 Register Descriptions ......................................................................................13
3.15 Register Summary ...........................................................................................16
4 Memories ................................................................................................ 17
4.1 Features ..........................................................................................................17
4.2 Overview ..........................................................................................................17
4.3 Flash Program Memory ...................................................................................17
4.4 Fuses and Lockbits ..........................................................................................19
4.5 Data Memory ...................................................................................................19
4.6 Internal SRAM .................................................................................................20
4.7 EEPROM .........................................................................................................20
4.8 I/O Memory ......................................................................................................20
4.9 Memory Timing ................................................................................................21
4.10 Device ID and Revision ...................................................................................21