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8210C–AVR–09/11
Atmel AVR XMEGA D
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Overview
The AVR XMEGA D microcontrollers is a family of low-power, high-performance, and peripheral-
rich CMOS 8/16-bit microcontrollers based on the AVR enhanced RISC architecture. By execut-
ing powerful instructions in a single clock cycle, the Atmel AVR XMEGA D devices achieve
throughputs approaching one million instructions per second (MIPS) per megahertz, allowing the
system designer to optimize power consumption versus processing speed.
The AVR CPU combines a rich instruction set with 32 general purpose working registers. All 32
registers are directly connected to the arithmetic logic unit (ALU), allowing two independent reg-
isters to be accessed in a single instruction, executed in one clock cycle. The resulting
architecture is more code efficient while achieving throughputs many times faster than conven-
tional single-accumulator or CISC based microcontrollers.
The Atmel AVR XMEGA D devices provide the following features: in-system programmable
flash with read-while-write capabilities; internal EEPROM and SRAM; four-channel event system
and programmable multilevel interrupt controller; up to 78 general purpose I/O lines; 16-bit real-
time counter (RTC); up to five flexible, 16-bit timer/counters with capture, compare and PWM
modes; up to four USARTs; up to two I
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C and SMBUS compatible two-wire serial interfaces
(TWIs); up to two serial peripheral interfaces (SPIs); CRC module; one 8-channel, 12-bit ADCs
with programmable gain; up to two analog comparators with window mode; programmable
watchdog timer with separate internal oscillator; accurate internal oscillators with PLL and pres-
caler; and programmable brown-out detection.
The program and debug interface (PDI), a fast, two-pin interface for programming and debug-
ging, is available.
The Atmel AVR XMEGA D devices have five software selectable power saving modes. The idle
mode stops the CPU while allowing the event system, interrupt controller, and all peripherals to
continue functioning. The power-down mode saves the SRAM and register contents, but stops
the oscillators, disabling all other functions until the next TWI, or pin-change interrupt, or reset.
In power-save mode, the asynchronous real-time counter continues to run, allowing the applica-
tion to maintain a timer base while the rest of the device is sleeping. In standby mode, the
external crystal oscillator keeps running while the rest of the device is sleeping. This allows very
fast startup from the external crystal, combined with low power consumption. In extended
standby mode, both the main oscillator and the asynchronous timer continue to run. To further
reduce power consumption, the peripheral clock to each individual peripheral can optionally be
stopped in active mode and idle sleep mode.
The devices are manufactured using Atmel high-density, nonvolatile memory technology. The
program flash memory can be reprogrammed in-system through the PDI interfaces. A boot
loader running in the device can use any interface to download the application program to the
flash memory. The boot loader software in the boot flash section will continue to run while the
application flash section is updated, providing true read-while-write operation. By combining an
8/16-bit RISC CPU with In-system, self-programmable flash, the AVR XMEGA D is a powerful
microcontroller family that provides a highly flexible and cost effective solution for many embed-
ded applications.
The Atmel AVR XMEGA D devices are supported with a full suite of program and system devel-
opment tools, including C compilers, macro assemblers, program debugger/simulators,
programmers, and evaluation kits.