261
8210C–AVR–09/11
Atmel AVR XMEGA D
21.14.6
INTFLAGS – Interrupt Flag register
• Bit 7:1 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always
write these bits to zero when this register is written.
• Bit 0 – CH0IF: Interrupt Flags
This flag is set when the ADC conversion is complete. If the ADC is configured for compare
mode, the interrupt flag will be set if the compare condition is met. CH0IF is automatically
cleared when the ADC interrupt vector is executed. The flag can also be cleared by writing a one
to its bit location.
21.14.7
TEMP – Temporary register
• Bit 7:0 – TEMP[7:0]: Temporary Register
This register is used when reading 16-bit registers in the ADC controller. The high byte of the 16-
bit register is stored here when the low byte is read by the CPU. This register can also be read
and written from the user software.
For more details on 16-bit register access, refer to
”Accessing 16-bit Registers” on page 11
21.14.8
CALL – Calibration Value register
The CALL and CALH register pair hold the 12-bit calibration value. The ADC pipeline is cali-
brated during production programming, and the calibration value must be read from the
signature row and written to the CAL register from software.
010
DIV16
16
011
DIV32
32
100
DIV64
64
101
DIV128
128
110
DIV256
256
111
DIV512
512
Table 21-6.
ADC prescaler settings (Continued).
Bit
7
6
5
4
3
2
1
0
–
–
–
–
–
–
–
CH0IF
INTFLAGS
Read/Write
R
R
R
R
R
R
R
R/W
Initial Value
0
0
0
0
0
0
0
0
Bit
7
6
5
4
3
2
1
0
TEMP[7:0]
TEMP
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial Value
0
0
0
0
0
0
0
0
Bit
7
6
5
4
3
2
1
0
CAL[7:0]
CALL
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial Value
0
0
0
0
0
0
0
0