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6174B–ATARM–07-Nov-05
AT91FR40162S Preliminary
18.3.2
Clock Selection
At block level, input clock signals of each channel can either be connected to the external inputs
TCLK0, TCLK1 or TCLK2, or be connected to the configurable I/O signals TIOA0, TIOA1 or
TIOA2 for chaining by programming the TC_BMR (Block Mode).
Each channel can independently select an internal or external clock source for its counter:
• Internal clock signals: MCK/2, MCK/8, MCK/32,
MCK/128, MCK/1024
• External clock signals: XC0, XC1 or XC2
The selected clock can be inverted with the CLKI bit in TC_CMR (Channel Mode). This allows
counting on the opposite edges of the clock.
The burst function allows the clock to be validated when an external signal is high. The BURST
parameter in the Mode Register defines this signal (none, XC0, XC1, XC2).
Note:
In all cases, if an external clock is used, the duration of each of its levels must be longer than the
system clock (MCK) period. The external clock frequency must be at least 2.5 times lower than the
system clock (MCK).
Figure 18-2. Clock Selection
MCK/2
MCK/8
MCK/32
MCK/128
MCK/1024
XC0
XC1
XC2
CLKS
CLKI
BURST
1
Selected
Clock
