Areva MiCOM P441, Technical Manual

Page: 631 / 636

Hard
war
e
/
S
o
ft
war
e
-V
er
si
on
P44x/EN
VC/E44
MiCOM
P4
41/P442
& P444
Pa
ge 5
/8
Relay type
: P441/P442 &
P444
Backward Compatibility
Softw
are
-
version
Hard
war
e
suffix
Model
number
Da
te of
issue
Full description of chang
es
S1 Compa
tibility
PSL
Setting
Files
Menu
Text
Files
Bran
ch C1.x
: Ne
w H
a
rd
w
a
re Platform
(New CPU Bo
ard
150
MHz +
Cop
roce
s
s
o
r
Boar
d
150
MHz
-2
nd rear port-T
rip tim
e
= 1.1
C
ycle
- 48 sam
p
le
s/T) & Functio
n
s
as B1.4
+ Ne
w Di
stan
ce F
eatures
Docum
e
ntati
on:
P44x
/EN T/E44
C1.0 20
04/200
4
New pla
tfo
rm
/model 20G
or 20
H/
Cpu
board at 150 MHz
/Fas
t
trippin
g
boa
rd
/46 outputs-P
444 mo
del 20
H/Power swin
g for
Chin
a
Dista
n
ce feature:
timer from Zn to Zn-1/
T
ilt s
e
ttable in
Z1Z2Z
p
/Outp
u
t “Phase-gro
und dete
c
tion
”/
PAP
(Wea
k
infeed for
RTE Fra
n
ce)/
Non
-comp
re
ssed di
stu
rba
n
c
e recordi
ng
at 24
s
a
mples
per
c
y
c
le/
C
ont
rol
input/InterMicom/Tp in D
E
F/D
E
F
timer from 2 to 100m
s/3
rd
&4
th
IN>/Intern
al trace by Zg
rap
h
Rela
y-opto e
v
ent log/Z
4
Zp
indicatio
n
V2.09 + pat
ch*
or
V2.10
C1.
1
G
for P441/44
2
G - H
for P444
20
12/200
4
Last C1.x b
ra
n
ch
ve
rsi
on:
UC
A2
/ InterMic
om
w
ith UCA2/Time
sync
cell in M
odBu
s
/Syn
c. TP bus/Opto
s
tagging in
eve
n
t/Dynami
c
man
agem
e
n
t of Bus-Lin
e
for ch
ecksync
V2.09 + pat
ch*
or
V2.10
No compatibil
ity with branch A.x
No compatibil
ity with branch B.x