Areva MiCOM P441, Technical Manual

Page: 375 / 636

App
lic
ati
o
n
N
o
te
s
P44x/EN
AP/E33
MiCOM
P4
41/P442
& P444
Page 201
/220
DDB label
In
Out
Default PSL
Set wit
h
:
Reset w
ith
:
TO
C S
tar
t A
Ou
t
S
e
t1
:
T
ri
p
o
rd
e
r
ph
a
se A initiat
e
d
b
y le
ve
ls de
te
ct
or
s in S
O
T
F
lo
g
ic
(P
icku
p
20
m
s de
la
yed
)
S
et 0 : R
e
se
t o
f
L
e
ve
l de
te
cto
rs
lo
gic
TOC
St
a
rt
B
Out
Se
t1
:Tri
p
order
phas
e B
in
itiat
e
d
by
lev
e
ls
de
tec
to
rs
in
SOTF lo
gic
(P
ickup
20
m
s de
la
yed
)
S
et 0 : R
e
se
t o
f
L
e
ve
l de
te
cto
rs
lo
gic
TOC
St
a
rt
C
Out
Se
t1
:Tri
p
order
phas
e C
in
itiat
e
d
by
lev
e
ls
de
tec
to
rs
in
SOTF lo
gic
(P
ickup
20
m
s de
la
yed
)
S
et 0 : R
e
se
t o
f
L
e
ve
l de
te
cto
rs
lo
gic
A
R
R
e
cla
im
Ou
t
Wh
e
n
at 1
(S
e
e
A
R
D
D
B
) st
a
rt
th
e
T
O
R lo
g
ic
S
et 0 :
(S
e
e
A
R
D
D
B
)
SOTF/
T
O
R
Trip
Out
Se
t1
:Tri
p order ini
tia
te
d
by
any
condition
ful
fil
led i
n
the SO
T
F
/T
O
R
logic
(See
logic
sec
tio
n
2.
12
–
f
ig
37
)
Se
t 0
:Whe
n co
ndi
tions
reset
(See
logic
sec
tio
n
2.
12
–
f
ig
37
)
A
n
y
P
o
le
D
e
ad
Ou
t
S
e
t1
:
M
in
imu
m
1
p
o
le
is o
p
e
n
Po
le
Dea
d
A
+
Po
le
Dea
d
B+Po
le
Dea
d
C
De
tec
tio
n
o
f
pol
e s
ta
tus
made
by
Cb
aux
o
r
in
te
rn
al
t
h
resho
lds
(se
e
dea
d
p
o
le
logic
in
SOTF sec
tio
n
2.1
2
–
fig
35
)
S
et 0 :
A
ll p
o
le
s
ar
e d
e
te
ct
ed
n
ot d
e
a
d
De
tec
tio
n
o
f
pol
e s
ta
tus
made
by
Cb
aux
o
r
in
te
rn
al
thr
e
sho
ld
s
A
ll Po
le D
e
a
d
Ou
t
S
e
t1
:
A
ll po
le
s ar
e op
e
n
P
o
le D
e
ad
A
& P.
D
e
ad
B
& P.
D
e
a
d
C
De
tec
tio
n
o
f
pol
e s
ta
tus
made
by
Cb
aux
o
r
in
te
rn
al
t
h
resho
lds
(se
e
dea
d
p
o
le
logic
in
SOTF sec
tio
n
2.1
2
–
fig
35
)
S
et 0 :1
p
o
le is de
te
ct
ed
n
o
t
d
e
a
d
De
tec
tio
n
o
f
pol
e s
ta
tus
made
by
Cb
aux
o
r
in
te
rn
al
thr
e
sho
ld
s
CIRCUIT BRE
AKER Logic (
CB Contro
l /
CB Monitoring / CB Fail)
CB
Aux
A
(5
2a)
In
o
p
to
ene
rg
ised i
f linke
d by
PSL
At
1 :
S
ta
tu
s inp
ut fr
o
m
C
B
-P
ole A is clo
se
d
R
e
se
t at 0 : op
to
po
w
e
r of
f
S
et 0 :
P
o
le A is
o
p
e
n
e
d
CB
Aux
A
(5
2b)
In
o
p
to
ene
rg
ised i
f linke
d by
PSL
At
1 :
S
ta
tu
s inp
ut fr
o
m
C
B
-P
ole A is
o
p
e
n
e
d
R
e
se
t at 0 : op
to
po
w
e
r of
f
S
et 0 :
P
o
le A is clo
se
d
CB
Aux
B
(5
2a)
In
o
p
to
ene
rg
ised i
f linke
d by
PSL
At
1 :
S
ta
tu
s inp
ut fr
o
m
C
B
-P
ole B is clo
se
d
R
e
se
t at 0 : op
to
po
w
e
r of
f
S
et 0 :
P
o
le B is
o
p
e
n
e
d
CB
Aux
B
(5
2b)
In
o
p
to
ene
rg
ised i
f linke
d by
PSL
At
1 :
S
ta
tu
s inp
ut fr
o
m
C
B
-P
ole B is
o
p
e
n
e
d
R
e
se
t at 0 : op
to
po
w
e
r of
f
S
et 0 :
P
o
le B is clo
se
d
CB
Aux
C
(52a)
In
o
p
to
ene
rg
ised i
f linke
d by
PSL
At
1 :
S
ta
tu
s inp
ut fr
o
m
C
B
-P
ole C is clo
sed
R
e
se
t at 0 : op
to
po
w
e
r of
f
S
et 0 :
P
o
le A is
o
p
e
n
e
d