Areva MiCOM P441, Technical Manual

Page: 297 / 636

Application Notes P44x/EN AP/E33
MiCOM P441/P442 & P444 Page 123/220
4.4.5 Logic inputs / Outputs from synchrocheck function
4.4.5.1 Logic DDB input from the check sync logic
MCB/VTS Bus
The DDB:MCB/VTS Bus if assigned to an opto input in PSL and when energized, will inform
the P44X about an internal maloperation from the VT used for synchrocheck ref. (BUS in
that case means Checksync ref measurement / even if the main VT is on the bus side and
the Synchro VT is on the line side)
When this opto picks up it will block the internal logic of Synchrocheck.
MCB/VTS Line
The DDB:MCB/VTS Line if assigned to an opto input in PSL and when energized, will inform
the P44X about an internal maloperation from the VT used for impedance measurement ref.
(Line in that case means Main VT ref measurement / even if the main VT are bus side and
the Synchro VT is line side)
When that opto picks up it will block the internal logic of Synchrocheck.
4.4.5.2 Logic DDB outputs issued by the check sync logic
Check Sync OK
Set high when Check Synchro conditions are verified
[Used with AR close in dedicated PSL – "AND" gate : [(AR Close) & (CheckSync OK)]
A/R Force Sync
Simulates the CheckSync control and force the logical DDB output "CheckSync OK" at 1
during a 1 pole or 3 poles high speed AR cycle. Without CheckSync control (See the
explanation in AR description Figure 76 and Figure 106)
V<Dead Line
Set high when the Dead line condition is verified (voltage below the V<Dead Line threshold
value (settable in MiCOM S1) – The measured voltage is always calculated as a single
phase voltage
V>Live Line
Set high when the Live line condition is verified (voltage above the V>Live Line threshold
value (settable in MiCOM S1) - always calculated as a single phase voltage ref
V<Dead Bus
Set high when the Dead Bus condition is verified (voltage below the V<Dead Bus threshold
value (settable in MiCOM S1) - always calculated as a single phase voltage ref
V>Live Bus
Set high when the Live Bus condition is verified (voltage above the V>Live Bus threshold
value (settable in MiCOM S1) - always calculated as a single phase voltage ref
Control No C/S
Set high when the internal Check Sync conditions are not verified
Ext Chk Synch OK
The DDB Ext Chk Synch OK if assigned to an opto input in PSL and when energized,
indicates that Check Sync conditions are verified by an external device – The DDB cell
should be assigned afterwards with an internal AR logic (See also AR description in section
4.5.1).