Analog Devices ADV8005, Hardware Reference Manual

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UG-707 ADV8005 Hardware Reference Manual
Table 55: MPEG InfoFrame Configuration Registers
Packet Map
Address
Access Type Field Name Default Value Byte Name 1
0xF220 R/W mpeg_hb0[7:0] 0b00000000 Header Byte 0
0xF221 R/W mpeg_hb1[7:0] 0b00000000 Header Byte 1
0xF222 R/W mpeg_hb2[7:0] 0b00000000 Header Byte 2
0xF223 R/W mpeg_pb0[7:0] 0b00000000 Data Byte 0
0xF224 R/W mpeg_pb1[7:0] 0b00000000 Data Byte 1
0xF225 R/W mpeg_pb2[7:0] 0b00000000 Data Byte 2
0xF226 R/W mpeg_pb3[7:0] 0b00000000 Data Byte 3
0xF227 R/W mpeg_pb4[7:0] 0b00000000 Data Byte 4
0xF228 R/W mpeg_pb5[7:0] 0b00000000 Data Byte 5
0xF229 R/W mpeg_pb6[7:0] 0b00000000 Data Byte 6
0xF22A R/W mpeg_pb7[7:0] 0b00000000 Data Byte 7
0xF22B R/W mpeg_pb8[7:0] 0b00000000 Data Byte 8
0xF22C R/W mpeg_pb9[7:0] 0b00000000 Data Byte 9
0xF22D R/W mpeg_pb10[7:0] 0b00000000 Data Byte 10
0xF22E R/W mpeg_pb11[7:0] 0b00000000 Data Byte 11
0xF22F R/W mpeg_pb12[7:0] 0b00000000 Data Byte 12
0xF230 R/W mpeg_pb13[7:0] 0b00000000 Data Byte 13
0xF231 R/W mpeg_pb14[7:0] 0b00000000 Data Byte 14
0xF232 R/W mpeg_pb15[7:0] 0b00000000 Data Byte 15
0xF233 R/W mpeg_pb16[7:0] 0b00000000 Data Byte 16
0xF234 R/W mpeg_pb17[7:0] 0b00000000 Data Byte 17
0xF235 R/W mpeg_pb18[7:0] 0b00000000 Data Byte 18
0xF236 R/W mpeg_pb19[7:0] 0b00000000 Data Byte 19
0xF237 R/W mpeg_pb20[7:0] 0b00000000 Data Byte 20
0xF238 R/W mpeg_pb21[7:0] 0b00000000 Data Byte 21
0xF239 R/W mpeg_pb22[7:0] 0b00000000 Data Byte 22
0xF23A R/W mpeg_pb23[7:0] 0b00000000 Data Byte 23
0xF23B R/W mpeg_pb24[7:0] 0b00000000 Data Byte 24
0xF23C R/W mpeg_pb25[7:0] 0b00000000 Data Byte 25
0xF23D R/W mpeg_pb26[7:0] 0b00000000 Data Byte 26
0xF23E R/W mpeg_pb27[7:0] 0b00000000 Data Byte 27
1 As defined in the latest CEA 861 specification
6.10.7. Gamut Metadata
The Gamut metadata packet (GMP) contains the sources Gamut boundary description. It is defined in the latest HDMI specification.
The contents of the GMP can be set via the Packet Map registers listed in Table 56 . The user can enable the transmission of GMP to the
downstream sink by setting the gm_pkt_en bit. When the transmission of GMP is enabled, the ADV8005 transmits a GMP once every two video
fields.
The ADV8005 transmits the GMP data starting 400 pixel clock cycles after the leading edge of VSync. In order to avoid corrupting the GMP
data during transmission, it is recommended that the user synchronizes all I 2 C writes to the GMP registers so that the write begins 512 pixel
clock cycles after the VSync leading edge. The VSync interrupt of the ADV8005 should be used to synchronize this timing. Figure 97 illustrates
this timing requirement.
gm_pkt_en , TX2 Main Map, Address 0xF440[2]
This bit is used to enable the Gamut Metadata Packet.
Function
gm_pkt_en Description
0 (default) Disabled
1 Enabled
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