UG-707
ADV8005 Hardware Reference Manual
arc1_pin_ie
, IO Map,
Address 0x1BD2[7]
This bit is used to control the input path enable for the ARC 1 pin.
Function
arc1_pin_ie
Description
0 (default)
input path disable
1
input path enable
arc2_pin_ie
, IO Map,
Address 0x1BD2[6]
This bit is used to control the input path enable for the ARC 2 pin.
Function
arc2_pin_ie
Description
0 (default)
input path disable
1
input path enable
int_pin_ie[2:0]
, IO Map,
Address 0x1BD2[5:3]
This bit is used to control the input path enable for the INT pins.
Function
int_pin_ie[2:0]
Description
0 (default)
input path disable
1
input path enable
sclk_ie
, IO Map,
Address 0x1BD2[2]
This bit is used to control the input path enable for the audio SCLK pin.
Function
sclk_ie
Description
0 (default)
input path disable
1
input path enable
mclk_ie
, IO Map,
Address 0x1BD2[1]
This bit is used to control the input path enable for the audio MCLK pin.
Function
mclk_ie
Description
0 (default)
input path disable
1
input path enable
dsd_clk_ie
, IO Map,
Address 0x1BD2[0]
This bit is used to control the input path enable for the audio DSD CLK pin.
Function
dsd_clk_ie
Description
0 (default)
input path disable
1
input path enable
spi1_cs_ie
, IO Map,
Address 0x1BD3[7]
This bit is used to control the input path enable for the spi1 CS pin.
Function
spi1_cs_ie
Description
0 (default)
input path disable
1
input path enable
spi1_miso_ie
, IO Map,
Address 0x1BD3[6]
This bit is used to control the input path enable for the spi1 MISO pin.
Function
spi1_miso_ie
Description
0 (default)
input path disable
1
input path enable
Rev. A | Page 50 of 317