Preliminary Data Sheet
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AC101
06/04/01
B r o a d c o m
Document AC101-DS01-405-R¥¥¥¥¥
Media Interface
Page 3
PCS B
YPASS
The AC101TF/QF is put into PCS bypass mode when the PCSBP pin is pull high (see ”Control and Status Pins” on page 14).
100 Mbps PCS Bypass
In MII designs, the encoding/decoding functions are performed in the PHY, thereby allowing 4-bit data exchange. Certain
designs, however, require MAC/PHY data transfer to be in the form of 5-bit symbols. By selecting PCS Bypass mode of op-
eration, the PHY will present data to, and accept data from the MAC layer as 5-bit symbols. In PCS Bypass mode the RX_ER
and TX_ER pins are used as the RXD4 and TXD4 (see ”MII (Media Independent Interface) 100 PCS Bypass Pins” on page
12).
10 Mbps PCS Bypass
When using PCS Bypass at 10 Mbps, the standard MAC/PHY interface is no longer valid. Differential drivers and receivers
carry data serially between the MAC and PHY (see ”10 Mbps PCS Bypass Pins” on page 13).
M
EDIA
I
NTERFACE
The AC101TF/QF can be media-configured using any of the following three methods:
•
Hardware configuration: see ”Control and Status Pins” on page 14.
•
Software configuration: see ”Register 21: Mode Control Register” on page 32.
•
Auto-Negotiation (ANeg): see ”Control and Status Pins” on page 14 and ”MII-Specified Registers” on page 24.
10BASE-T I
NTERFACE
When configured to run in 10BASE-T mode, either through hardware configuration, software configuration, or ANeg, the
PHY will support all the features and parameters of the industry standards.
Transmit Function
If the MII interface is used, Parallel to Serial logic is used to convert the 4-bit data into the serial stream. If the 7-Wire interface
is used (see ”10 Mbps 7-Wire Interface Pins” on page 13), the serial data goes directly to the Manchester encoder where it
is synthesized through the output waveshaping driver. The waveshaper reduces any EMI emission by filtering out the har-
monics, therefore eliminating the need for an external filter.
Receive Function
The received signal passes through a low-pass filter, which filters out the noise from the cable, board, and transformer. This
eliminates the need for a 10BASE-T external filter. A Manchester decoder converts the incoming serial stream. If the 7-wire
10BASE-T interface is enabled (see ”10 Mbps 7-Wire Interface Pins” on page 13), the decoded serial data is presented to
the MAC. If the MII interface is used (see ”MII (Media Independent Interface) 100 PCS Bypass Pins” on page 12), Serial to
Parallel logic is used to generate the 4-bit data.
Link Monitor
The 10-BASE-T link-pulse detection circuit will constantly monitor the RXIP/RXIN pins (see ”MDI (Media Dependent Inter-
face) Pins” on page 11) for the presence of valid link pulses. In the absence of valid link pules, the Link Status bit will be
cleared and the Link LED will de-assert.
100BASE-TX I
NTERFACE
When configured to run in 100BASE-TX mode, either through hardware configuration, software configuration, or ANeg, the
PHY will support all the features and parameters of the industry standards.