Preliminary Data Sheet
■
AC101
06/04/01
B r o a d c o m
Document AC101-DS01-405-R¥¥¥¥¥
Pin Descriptions
Page 13
10 M
BPS
PCS B
YPASS
P
INS
10 M
BPS
7-W
IRE
I
NTERFACE
P
INS
TXD [3]
TXD [2]
TXD [1]
TXD [0]
40
39
38
37
50
49
48
47
I
Transmit Data. The MAC will source TXD[3:0] synchronous with TX_CLK
when TX_EN is asserted.
PCS Bypass TXD[3:0]
COL
41
56
O, Z
Collision. COL is asserted high when a collision is detected on the media.
CRS
42
57
O, Z
Carrier Sense. CRS is asserted high when twisted pair media is non-idle.
INTR
43
58
O, Z
Interrupt. See Registers 16 and 17 for polarity and sources. The INTR pin
has a high impedance output, a 1K
Ω
pull-up or pull-down resistor is
needed.
Table 4:
10 Mbps PCS Bypass Pins
Pin Name
101TF
101QF
Type
Description
TP_RD-
TP_RD+
TP_TD++
TP_TD--
TP_TD+
TP_TD-
14
15
16
19
17
18
19
20
21
24
22
23
I/O, U
I/O, U
I, U
I, U
I, U
I, U
10BASE-T serial input and output. The ANeg function is disabled, there-
fore, the MAC is responsible for generating FLP and performing media
arbitration.
Table 5:
10 Mbps 7-Wire Interface Pins
Pin Name
101TF
101QF
Type
Description
10RD
26
36
O, Z
Receive Data. 10 MHz serial data output.
10RCLK
30
40
O, Z
10 MHz receive clock.
10TCLK
33
43
O, Z
10 MHz transmit clock. (10TCLK goes idle 5 seconds after link drop.)
10TXEN
34
44
I
Transmit enable.
10TD
37
47
I
Transmit Data. 10 MHz serial data input.
10COL
41
56
O, Z
Collision. COL is asserted high when a collision is detected on the media
10CRS
42
57
O, Z
Carrier Sense. CRS is asserted high when twisted pair media is active.
Table 3:
MII (Media Independent Interface) 100 PCS Bypass Pins (Cont.)
Pin Name
101TF
101QF
Type
Description