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AC101
Preliminary Data Sheet
06/04/01
B r o a d c o m
Page 40
Digital Timing Characteristics
Document AC101-DS01-405-R¥¥¥¥¥
Figure 7:
Management Data Interface Timing
100BASE-TX/FX MII T
RANSMIT
S
YSTEM
T
IMING
Table 41:
100BASE-TX/FX MII Transmit System Timing
Parameter
SYM
Conditions
Min
Typ
Max
Units
TX_CLK period
tCK
39.998
40.000
40.002
ns
TX_CLK High period
tCKH
18.000
20.000
22.000
ns
TX_CLK Low period
tCKL
18.000
20.000
22.000
ns
TX_EN to /J/
tTJ
-
40
180
ns
TX_EN sampled to
CRS
tCSA
RPTR is logic low
-
40
180
ns
TX_EN sampled to
COL
tCLA
RPTR is logic low
-
40
180
ns
!TX_EN to /T/
tTT
-
40
180
ns
!TX_EN sampled to
!CRS
tCSD
RPTR is logic low
-
40
180
ns
!TX_EN sampled to
!COL
tCLD
RPTR is logic low
-
40
180
ns
TX Propagation Delay
tTJ
From TXD[3:0] to TXOP/N(FXTP/N)
-
40
180
ns
TXD[3:0], TX_EN,
TX_ER Setup
tTXS
From rising edge of TX_CLK
10
-
-
ns
TXD[3:0], TX_EN,
TX_ER Hold
tTXH
From rising edge of TX_CLK
0
-
-
ns
!TX_EN to TX_EN
tTX_TX
120
-
-
ns
MDC
MDIO
tMDCH
tMH
tMS
tMDCL