Agilent Technologies 1660A Series, User Reference

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When the analyzer sees a match between the slave clock input and the Slave
Clock arrangement, Demux Slave data is latched. Then, followed by a match
of the master clock and the master clock arrangement, the slave data is
strobed into analyzer memory along with the master data. If multiple slave
clocks occur between master clocks, only the data latched by the last slave
clock prior to the master clock is strobed into analyzer memory.
Latching Slave Data In Demultiplex Mode
Analyzer Memory
Slave Latch
Pod 1
Master
Clock
Slave
Clock
Pod 2 is not connected
The Format Menu
Pod Clock Field (State only)
11–18