E5
−
H High Performance Universal Inverter User Manual
86 Chapter
6
Parameter
Description
As shown in Figure 6
−
31 PID Schematic Diagram, the higher the Kp value is, the faster the response is,
but if the Kp value is too big, it may easily generate oscillation and the deviation cannot be eliminated
completely. It can use Ki to eliminate the residual deviation. The higher the Ki value is, the faster the
response of the inverter to the deviation change, but it may easily generate oscillation if the Ki value is
too big. If the system has frequent feedback to the jump, it needs to use Kd because Kd can respond to
the deviation change between the system feedback and the reference quickly. The higher the Kd value is,
the faster the response is, but it may easily generate oscillation if the value is too big.
This function is used to set the sampling cycle of the feedback signal. The lower this parameter value is,
the faster the system response to the deviation between the reference and the feedback, but if the
sampling cycle is too fast, the associate requirement for the system PID gain adjustment will be higher,
which may result in system oscillation.
When this function determines the certain level of the deviation between the feedback signal and the
reference signal, it will stop the internal PID regulation and maintain stable output. Only when the
deviation between the feedback value and the reference value of the close loop exceeds the deviation
limit of P8.07 will the output be updated. Setting the deviation limit needs to take the system control
precision and stability into consideration.
This function determines the specific running mode during the process close loop adjustment.
Display of operation panel
Unit
place
Integration mode
0: Frequency reaches its high limit and low limit the
integration adjustment is stopped;
1: Frequency reaches its high limit and low limit and the
integration adjustment continues
Tens
place
Output frequen cy
0: It must be consistent with the setup running direction.
1: It can be reverse to the setup running direction
If the output value of the close loop adjustment reaches frequency high limit or low limit (P0.13 or P0.14),
there are two actions for selection in the integration section.
0: Stop integration adjustment: the integration value remains unchanged. When there is change
occurring to the deviation between the reference value and the feedback value, the integration value will
follow that change trend.
1: Continue integration adjustment: The integration value will immediately respond to the change
between the reference value and the feedback value unless this value reaches the internal integration
limit. When there is change occurring to the deviation between the reference value and the feedback
value changes, it needs to take longer time to offset the impact brought by the continuous integration so
that the integration value can catch up that change trend.
If the output value of the close loop adjustment is inconsistent with the current setup running direction,
P8.06
Sampling cycle
0.001 ~ 30.000 s(0.002s)
P8.07
Deviation limit
0.0 ~ 20.0 %(5.0%)
P8.08
PID adjustment selection
0 ~ 11(10)
