Terasic TR10a-HL, Руководство пользователя

Страница: 30 / 112

30
Class I
QDRIIC_CQ_p
Echo clock P
1.8-V HSTL Class I PIN_AD36
QDRIIC_CQ_n Echo clock N 1.8-V HSTL Class I PIN_AC36
QDRIIC_RPS_n Report Select 1.8-V HSTL Class I PIN_E26
QDRIIC_WPS_n
Write Port Select
1.8-V HSTL Class I PIN_F26
QDRIIC_DOFF_n
PLL Turn Off
1.8-V HSTL Class I PIN_D24
QDRIIC_ODT
On-Die Termination
Input
1.8-V HSTL Class I PIN_B25
QDRIIC_QVLD
Valid Output Indicator
1.8-V HSTL Class I PIN_W35
Table 2-14 QDRII+ SRAM D Pin Assignments, Schematic Signal Names, and
Functions
Schematic
Signal Name
Description I/O Standard
Arria 10 GX
Pin Number
QDRIID_A0 Address bus[0] 1.8-V HSTL Class I PIN_Y32
QDRIID_A1 Address bus[1] 1.8-V HSTL Class I PIN_W33
QDRIID_A2 Address bus[2] 1.8-V HSTL Class I PIN_P34
QDRIID_A3 Address bus[3] 1.8-V HSTL Class I PIN_P33
QDRIID_A4 Address bus[4] 1.8-V HSTL Class I PIN_L32
QDRIID_A5 Address bus[5] 1.8-V HSTL Class I PIN_K32
QDRIID_A6 Address bus[6] 1.8-V HSTL Class I PIN_R34
QDRIID_A7 Address bus[7] 1.8-V HSTL Class I PIN_R33
QDRIID_A8 Address bus[8] 1.8-V HSTL Class I PIN_T32
QDRIID_A9 Address bus[9] 1.8-V HSTL Class I PIN_R32
QDRIID_A10 Address bus[10] 1.8-V HSTL Class I PIN_N32
QDRIID_A11 Address bus[11] 1.8-V HSTL Class I PIN_M32
QDRIID_A12 Address bus[12] 1.8-V HSTL Class I PIN_T31
QDRIID_A13 Address bus[13] 1.8-V HSTL Class I PIN_R31
QDRIID_A14 Address bus[14] 1.8-V HSTL Class I PIN_K38
QDRIID_A15 Address bus[15] 1.8-V HSTL Class I PIN_L37
QDRIID_A16 Address bus[16] 1.8-V HSTL Class I PIN_K36
QDRIID_A17 Address bus[17] 1.8-V HSTL Class I PIN_N33
QDRIID_A18 Address bus[18] 1.8-V HSTL Class I PIN_M33
QDRIID_A19 Address bus[19] 1.8-V HSTL Class I PIN_L39
QDRIID_A20 Address bus[20] 1.8-V HSTL Class I PIN_K39