Operating Basics
26
GTS1063 and GTS1250 GBIC Test Systems Instruction Manual
Adding Jitter to the Transmitted Signal
Under normal conditions, the clock source should be essentially jitter free to test
a GBIC. However, you may want to stress the system. To do so, the GBIC Test
System has a jitter input to modulate the phase of the clock.
On the receive end, the BERT monitors the effect of the controlled jitter in two
ways. First it looks for an increased error rate. Second, it measures the jitter
remaining in the recovered data.
As shown in figures 13 and 14, the setup for adding jitter to the transmitted
signal is the same as for bit error rate testing except for the insertion of a
sinewave or DC voltage at the JITTER IN input.
To add jitter to the transmitted signal perform the following steps:
1. Set up the equipment as shown in Figure 13 or 14.
2. If using the setup in Figure 13, set the sinewave generator to the desired jitter
frequency.
3. Set the sinewave generator or DC voltage to the amplitude required to
generate the desired horizontal jitter (see External Tx Jitter Input Specifica-
tions on page 32.
4. If you have a clock generator source capable of adding frequency or phase
modulation to the clock, then alternatively you can also produce jitter on the
front panel and GBIC signals by applying such a clock to the rear-panel
Ext Clk IN input.
GBIC Test
System
GBIC
Tx
Rx
(Tx and Rx ends are close together)
Select
PRBS7,
LONG,
SHORT,
CPAT, or
CJTPAT Tx
patterns
Set Rx
pattern to
match
transmit
pattern
GBE Fiber path under test
GB1400R
Clk
Data
Recov Clk
Recov Data
TX JITTER
Adjustable
Sine Generator
Figure 13: Stress Testing via increasing Transmitted Jitter through the rear Tx
JITTER INPUT
Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com
