ST10 FAMILY PROGRAMMING MANUAL
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12
4
ADDC
reg, mem
13
4
ADDCB
reg, mem
14
4
ADDC
mem, reg
15
4
ADDCB
mem, reg
16
4
ADDC
reg, #data
16
17
4
ADDCB
reg, #data
16
18
2
ADDC
Rw
n
, [Rw
i
+] or Rw
n
, [Rw
i
] or Rw
n
, #data
3
19
2
ADDCB
Rb
n
, [Rw
i
+] or Rb
n
, [Rw
i
] or Rb
n
, #data
3
1A
4
BFLDH
bitoff
Q
, #mask
8
, #data
8
1B
2
MULU
Rw
n
, Rw
m
1C
2
ROL
Rw
n
, #data
4
1D
2
JMPR
cc_NET, rel
1E
2
BCLR
bitaddr
Q.1
1F
2
BSET
bitaddr
Q.1
20
2
SUB
Rw
n
, Rw
m
21
2
SUBB
Rb
n
, Rb
m
22
4
SUB
reg, mem
23
4
SUBB
reg, mem
24
4
SUB
mem, reg
25
4
SUBB
mem, reg
26
4
SUB
reg, #data
16
27
4
SUBB
reg, #data
16
28
2
SUB
Rw
n
, [Rw
i
+] or Rw
n
, [Rw
i
] or Rw
n
, #data
3
29
2
SUBB
Rb
n
, [Rw
i
+] or Rb
n
, [Rw
i
] or Rb
n
, #data
3
2A
4
BCMP
bitaddr
Z.z
, bitaddr
Q.q
2B
2
PRIOR
Rw
n
, Rw
m
2C
2
ROR
Rw
n
, Rw
m
2D
2
JMPR
cc_EQ, rel or cc_Z, rel
2E
2
BCLR
bitaddr
Q.2
2F
2
BSET
bitaddr
Q.2
30
2
SUBC
Rw
n
, Rw
m
31
2
SUBCB
Rb
n
, Rb
m
32
4
SUBC
reg, mem
33
4
SUBCB
reg, mem
Table 21 : Instruction set ordered by Hex code (continued)
Hex- code
Number of Bytes
Mnemonic
Operand
Содержание ST10 Series
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