ST10 FAMILY PROGRAMMING MANUAL
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ANDB
Rb, [Rw+]
Bitwise AND indirect byte memory with direct GPR and
post-increment source pointer by 1
2
6
2
3
4
6
2
ANDB
Rb, #data
3
Bitwise AND immediate byte data with direct GPR
2
6
2
3
4
6
2
ANDB
reg, #data
16
Bitwise AND immediate byte data with direct register
2
8
4
6
8
12
4
ANDB
reg, mem
Bitwise AND direct byte memory with direct register
2
8
4
6
8
12
4
ANDB
mem, reg
Bitwise AND direct byte register with direct memory
2
8
4
6
8
12
4
OR
Rw, Rw
Bitwise OR direct word GPR with direct GPR
2
6
2
3
4
6
2
OR
Rw, [Rw]
Bitwise OR indirect word memory with direct GPR
2
6
2
3
4
6
2
OR
Rw, [Rw+]
Bitwise OR indirect word memory with direct GPR and
post-increment source pointer by 2
2
6
2
3
4
6
2
OR
Rw, #data
3
Bitwise OR immediate word data with direct GPR
2
6
2
3
4
6
2
OR
reg, #data
16
Bitwise OR immediate word data with direct register
2
8
4
6
8
12
4
OR
reg, mem
Bitwise OR direct word memory with direct register
2
8
4
6
8
12
4
OR
mem, reg
Bitwise OR direct word register with direct memory
2
8
4
6
8
12
4
ORB
Rb, Rb
Bitwise OR direct byte GPR with direct GPR
2
6
2
3
4
6
2
ORB
Rb, [Rw]
Bitwise OR indirect byte memory with direct GPR
2
6
2
3
4
6
2
ORB
Rb, [Rw+]
Bitwise OR indirect byte memory with direct GPR and
post-increment source pointer by 1
2
6
2
3
4
6
2
ORB
Rb, #data
3
Bitwise OR immediate byte data with direct GPR
2
6
2
3
4
6
2
ORB
reg, #data
16
Bitwise OR immediate byte data with direct register
2
8
4
6
8
12
4
ORB
reg, mem
Bitwise OR direct byte memory with direct register
2
8
4
6
8
12
4
ORB
mem, reg
Bitwise OR direct byte register with direct memory
2
8
4
6
8
12
4
XOR
Rw, Rw
Bitwise XOR direct word GPR with direct GPR
2
6
2
3
4
6
2
XOR
Rw, [Rw]
Bitwise XOR indirect word memory with direct GPR
2
6
2
3
4
6
2
XOR
Rw, [Rw+]
Bitwise XOR indirect word memory with direct GPR and
post-increment source pointer by 2
2
6
2
3
4
6
2
XOR
Rw, #data
3
Bitwise XOR immediate word data with direct GPR
2
6
2
3
4
6
2
XOR
reg, #data
16
Bitwise XOR immediate word data with direct register
2
8
4
6
8
12
4
XOR
reg, mem
Bitwise XOR direct word memory with direct register
2
8
4
6
8
12
4
XOR
mem, reg
Bitwise XOR direct word register with direct memory
2
8
4
6
8
12
4
XORB
Rb, Rb
Bitwise XOR direct byte GPR with direct GPR
2
6
2
3
4
6
2
XORB
Rb, [Rw]
Bitwise XOR indirect byte memory with direct GPR
2
6
2
3
4
6
2
XORB
Rb, [Rw+]
Bitwise XOR indirect byte memory with direct GPR and
post-increment source pointer by 1
2
6
2
3
4
6
2
XORB
Rb, #data
3
Bitwise XOR immediate byte data with direct GPR
2
6
2
3
4
6
2
XORB
reg, #data
16
Bitwise XOR immediate byte data with direct register
2
8
4
6
8
12
4
XORB
reg, mem
Bitwise XOR direct byte memory with direct register
2
8
4
6
8
12
4
XORB
mem, reg
Bitwise XOR direct byte register with direct memory
2
8
4
6
8
12
4
Table 10 : Logical instructions (continued)
Mnemonic
Description
Int RO
M
Int. RA
M
16-
bit N-
Mux
16
-bit M
u
x
8-b
it N-M
ux
8
-bit M
U
X
Byte
s
Содержание ST10 Series
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