STMicroelectronics ST10 Series, Руководство по программированию

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ST10 FAMILY PROGRAMMING MANUAL
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Table 8 lists the instructions by their mnemonic and identifies the addressing modes that may be used with
a specific instruction and the instruction length, depending on the selected addressing mode (in bytes).
Table 8 : Mnemonic vs address mode & number of bytes
Mnemonic Addressing Modes Bytes Mnemonic Addressing Modes Bytes
ADD[B]
Rw
n
1
, Rw
m
1 2 CPL[B]
Rw
n
1 2
ADDC[B]
Rw
n
1
, [Rw
i
]
2 NEG[B]
AND[B]
Rw
n
1
, [Rw
i
+]
2 DIV Rw
n
2
OR[B]
Rw
n
1
, #data
3
2 DIVL
SUB[B] reg, #data
16
4 DIVLU
SUBC[B] reg, mem 4 DIVU
XOR[B] mem, reg 4 MUL Rw
n
, Rw
m
2
MULU
ASHR Rw
n
, Rw
m
2 CMPD1/2 Rw
n
, #data
4
2
ROL / ROR Rw
n
, #data
4
2 CMPI1/2 Rw
n
, #data
16
4
SHL / SHR Rw
n
, mem 4
BAND bitaddr
Z.z
, bitaddr
Q.q
4 CMP[B]
Rw
n
, Rw
m
1
BCMP
Rw
n
, [Rw
i
]
1 2
BMOV
Rw
n
, [Rw
i
+]
1 2
BMOVN
Rw
n
, #data
3
1 2
BOR / BXOR reg, #data
16
4
reg, mem 4
BCLR bitaddr
Q.q
, 2 CALLA cc, caddr 4
BSET JMPA
BFLDH bitoff
Q
, #mask
8
, #data
8
4 CALLI cc, [Rw
n
] 2
BFLDL JMPI
MOV[B]
Rw
n
1
, Rw
m
1 2
CALLS seg, caddr
4
Rw
n
1
, #data
4
2 JMPS
Rw
n
1
, [Rw
m
]
2 CALLR rel 2
Rw
n
1
, [Rw
m
+]
2
JMPR cc, rel
2
[Rw
m
], Rw
n
1 2 JB bitaddr
Q.q
, rel 4
[-Rw
m
], Rw
n
1 2
JBC
[Rw
n
], [Rw
m
] 2 JNB
[Rw
n
+], [Rw
m
]
2
JNBS
[Rw
n
], [Rw
m
+] 2 PCALL reg, caddr 4
reg, #data
16
4 POP reg 2
Rw
n,
[Rw
m
+#data
16
]
1 4 PUSH
[Rw
m
+#data
16
], Rw
n
1 4 RETP
[Rw
n
], mem
4
SCXT reg, #data
16
4
mem, [Rw
n
] 4 reg, mem 4
reg, mem
4
PRIOR Rw
n
, Rw
m
2
mem, reg 4