Simatic 505 SoftShop
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Shift Register Memory
A block of memory within the controller is reserved for the operation of
the shift registers, which include the following:
•
Bit Shift Register (SHRB).
•
Word Shift Register (SHRW).
When you assign a number to a shift register, be sure that you do not use that
number for any other shift register type. For example, do not configure SHRB11
and SHRW11.
Assigning the same number for more than one shift register could cause
unpredictable operation by the controller, which could result in death or serious
injury to personnel and/or damage to equipment.
Do not assign the same reference number to more than one shift register
instruction.
This memory type consists of one byte per shift register. This byte is used
to save the previous state of the instruction input.
Drum Memory
A block of memory within the controller is reserved for the operation of
the various drum types, including the following:
Drum (DRUM)
Event Drum (EDRUM)
Maskable Event Drum
Discrete(MDRMD)
Maskable Event Drum
Word(MDRMW)
When you assign a number to a drum type instruction, be sure that you do not use
that number for any other drum type instruction. For example, if you configure a
Maskable Event Drum Word #1 (MDRMW1), do not configure an Event Drum #1
(EDRUM1).
Assigning the same reference number to more than one drum type instruction
could cause unpredictable operation by the controller, which could result in death
or serious injury to personnel and/or damage to equipment.
Do not assign the same reference number to more than one drum type instruction
.
Drum memory is divided into
areas for storing the following types of
information:
Drum Step Preset (DSP)
Drum Step Current (DSC)
Drum Count Preset (DCP)
Drum Count Current (DCC)
When you specify step and counts-per-step (count preset) values for a
drum type, the step preset is stored as a 16-bit word in DSP-Memory, and