LH79524/LH79525 User’s Guide
External Memory Controller
Version 1.0
7-39
7.5.2.10 Dynamic Memory Last Data Out to Active Time
Register (DOACTIVE)
The Dynamic Memory Last Data Out to Active Time Register enables programming the
Last-data-out to Active Command Time, tAPR. This value is normally found in SDRAM
data sheets as tAPR.
This register must only be modified during system initialization, or when there are
no current or outstanding transactions. Software can ensure that there are no current or
outstanding transactions by waiting until the memory controller is idle, then entering
Low-Power Mode (CONTROL:MODE = 1), or Disable Mode (CONTROL:ENABLE = 0).
When in these two modes, external memory access is not allowed, ensuring that
changing parameters will not corrupt external data. Low-Power Mode automatically
refreshes SDRAM; Disable Mode requires commanding the SDRAM to Self Refresh
(DYNMCTRL:SR = 1) prior to entering Disable.
Table 7-29. DOACTIVE Register
BIT
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
FIELD
///
RESET
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TYPE
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
BIT
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
FIELD
///
tAPR
RESET
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
TYPE
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RW
RW
RW
RW
ADDR
0xFF 0x03C
Table 7-30. DOACTIVE Fields
BITS NAME
FUNCTION
31:4
///
Reserved
Reading returns 0. Write the reset value.
3:0
tAPR
Last-Data-Out to Active Command Time
Time = (tAPR + 1) External Memory Clock periods