Color Liquid Crystal Display Controller
LH79524/LH79525 User’s Guide
4-4
Version 1.0
Figure 4-3. Color LCD Controller Block Diagram
LH79525-37
AHB
MASTER
INTERF
A
C
E
AD
V
ANCED HIGH
PERFORMANCE
B
US (AHB)
AHB
SLA
VE
INTERF
A
C
E
P
ANEL
CLOCK
GENERA
T
O
R
TIMING
CONTR
OLLER
CONTR
OL
AND
ST
A
TUS
REGISTER
UPPER
P
ANEL
FORMA
TTER
UPPER
P
ANEL
OUTPUT
FIFO
STN/TFT
D
ATA
SELECT
UPPER
STN D
A
T
A
LCD P
ANEL
CLOCK
LCD P
ANEL
CONTR
OL
INPUT
FIFO
CONTR
OL
PIXEL
SERIALIZER
P
ALETTE
(128 × 32)
GRA
Y
SCALER
CLCDCLK
UPPER
P
ANEL
DMA
FIFO
LO
WER
P
ANEL
DMA
FIFO
LO
WER
P
ANEL
FORMA
TTER
INTERR
UPT
GENERA
TION
INTERR
UPTS
LO
WER
P
ANEL
OUTPUT
FIFO
LO
WER
STN
D
ATA
TFT D
A
T
A
FIFO UNDERFLO
W
AHB ERR
OR
LCD
P
ANEL
D
ATA