Samsung MSYS 5150, Руководство по обслуживанию

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5-2 Samsung Electronics
Circuit Description
5-1-2 MFP Controller (KS32C6100 : U1)
Fig.5-2. Uart Block Diagram
SYSTEM CLOCK
The internal clock frequency is 33MHz 66MHz system
clock (MCLK) supplied from the outside is used being
divided inside.
D ATA & ADDRESS BUS CONTROL
• /RD & /FMEM_WR, /WR
/RD & /FMEM_WR signals are synchronized with
MCLK(33MHz) and become LOW ACTIVE.
These signals are strobe signals used to read and
write data when each CHIP SELECT is connected
with /RD and /WR pin of RAM, ROM, MODEM
and the outside devices and becomes active.
/WR is strobe signal used only write signal for
SCAM image processor.
• CHIP SELECT (/SDIP_CS, /RCS0, /RCS2, /MCS,
/SCS
- /SDIP_CS : SCAN MEMORY CHIP SELECT (LOW
ACTIVE)
- /RCS0 : FLASH MEMORY CHIP SELECT (LOW
ACTIVE)
- /RCS2 : MASK ROM CHIP SELECT (LOW
ACTIVE)
- /MCS : MODEM CHIP SELECT (LOW ACTIVE)
- /SCS : SRAM CHIP SELECT (LOW ACTIVE)
• D0 - D31
- 32bit data bus
• A0 - A23
- ADDRESS BUS (A22 - A23 are reserved.)
SERIAL C O M M U N I C ATION PA RT
U A RT (Universal Asynchronous
Receiver/Transmitter) at KS32C6100 enables the main
and LIU, main and OPE to transmit serial data. The
block diagram of UART is as follows:
KS32C6100 has two UART channels. The baud rate is
9600bps.